参数资料
型号: TDA8374A/N3
厂商: NXP SEMICONDUCTORS
元件分类: 消费家电
英文描述: SPECIALTY CONSUMER CIRCUIT, PDIP56
封装: 0.600 INCH, PLASTIC, SOT-400, SDIP-56
文件页数: 6/75页
文件大小: 522K
代理商: TDA8374A/N3
1997 Jul 01
14
Philips Semiconductors
Preliminary specication
I2C-bus controlled economy PAL/NTSC
and NTSC TV-processors
TDA837x family
Fig.7 Configuration CVBS switch and interfacing of video identification.
handbook, full pagewidth
MGK301
VIDEO
IDENTIFICATION
S0
VIM
IDENT
TDA837x
CVBSint
13
S0
S5
S1
CVBSext
17
S1
S6
S2
CVBS/Y
11
S3
S7
S4
CHROMA
CVBSO
10
38
to luminance/
sync processing
to chrominance
processing
S8
+
Sound circuit
The sound band-pass and trap filters have to be
connected externally. The filtered intercarrier signal is fed
to a limiter circuit and is demodulated by a PLL
demodulator. This PLL circuit automatically tunes to the
incoming carrier signal, hence no adjustment is required.
The volume is controlled via the I2C-bus. The de-emphasis
capacitor has to be connected externally.
The non-controlled audio signal can be obtained from this
pin (pin 55) (via a buffer stage).
The FM demodulator can be muted via the I2C-bus. This
function can be used to switch-off the sound during a
channel change so that high output peaks are prevented
(also on the de-emphasis output).
The TDA8373 and TDA8374 contain an Automatic Volume
Levelling (AVL) circuit which automatically stabilizes the
audio output signal to a certain level which can be set by
the user via the volume control. This function prevents big
audio output fluctuations due to variations of the
modulation depth of the transmitter. The AVL function can
be activated via the I2C-bus.
Synchronization circuit
The sync separator is preceded by a controlled amplifier
which adjusts the sync pulse amplitude to a fixed level.
These pulses are fed to the slicing stage which operates at
50% of the amplitude.
The separated sync pulses are fed to the first phase
detector and to the coincidence detector. The coincidence
detector is used to detect whether the line oscillator is
synchronized and can also be used for transmitter
identification. The circuit can be made less sensitive by
using the STM bit. This mode can be used during search
tuning to ensure that the tuning system will not stop at very
weak input signals. The first PLL has a very high static
steepness so that the phase of the picture is independent
of the line frequency.
The line oscillator operates at twice the line frequency.
The oscillator capacitor is internal. Because of the spread
of internal components an automatic calibration circuit has
been added to the IC. The circuit compares the oscillator
frequency with that of the crystal oscillator in the colour
decoder.
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