参数资料
型号: TDA8374A/N3
厂商: NXP SEMICONDUCTORS
元件分类: 消费家电
英文描述: SPECIALTY CONSUMER CIRCUIT, PDIP56
封装: 0.600 INCH, PLASTIC, SOT-400, SDIP-56
文件页数: 27/75页
文件大小: 522K
代理商: TDA8374A/N3
1997 Jul 01
33
Philips Semiconductors
Preliminary specication
I2C-bus controlled economy PAL/NTSC
and NTSC TV-processors
TDA837x family
Sc(th)
peaking signal compression
threshold
50
IRE
OS
overshoot at maximum peaking
positive
45
%
negative
80
%
neg/pos
ratio of negative and positive
overshoots
1.8
peaking control curve
16 steps
see Fig.9
NOISE CORING STAGE
S
coring range
15
IRE
BLACK LEVEL STRETCHER; note 29
BLshift(max)
maximum black level shift
15
21
27
IRE
BLshift
level shift
at 100% of peak white
1
0
+1
IRE
at 50% of peak white
1
+3
IRE
at 15% of peak white
6
8
10
IRE
Horizontal and vertical synchronization and drive circuits
SYNC VIDEO INPUT (PINS 11, 13 AND 17)
V11,13,17
sync pulse amplitude
note 2
50
300
350
mV
SLHS
slicing level for horizontal sync
note 30
50
%
SLVS
slicing level for vertical sync
note 30
30
%
HORIZONTAL OSCILLATOR
ffr
free running frequency
15625
Hz
f
fr
spread on free running
frequency
±2%
f/V
P
frequency variation with respect
to the supply voltage
VP = 8.0 V ±10%; note 4
0.2
0.5
%
f
(max)(T)
maximum frequency variation
with temperature
Tamb = 0 to 70 °C; note 4
80
Hz
FIRST CONTROL LOOP (FILTER CONNECTED TO PIN 43); note 31
fhr(PLL)
holding range PLL
±0.9
±1.2
kHz
fcr(PLL)
catching range PLL
note 4
±0.6
±0.9
kHz
S/N
signal-to-noise ratio of the video
input signal at which the time
constant is switched
20
dB
HYS
hysteresis at the switching point
1
dB
SECOND CONTROL LOOP (CAPACITOR CONNECTED TO PIN 42)
i/o
control sensitivity
150
s/s
tcr
control range from start of
horizontal output to yback at
nominal shift position
11
12
s
tshift
horizontal shift range
63 steps
±2
s
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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