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型号： THS4215DGN
厂商： TEXAS INSTRUMENTS INC
元件分类： 音频／视频放大
英文描述： 1 CHANNEL, VIDEO AMPLIFIER, PDSO8
封装： POWERPAD, GREEN, PLASTIC, MSOP-8
文件页数： 20/47页
文件大小： 1197K
代理商： THS4215DGN
THS4211
THS4215
www.ti.com ................................................................................................................................... SLOS400E – SEPTEMBER 2002 – REVISED SEPTEMBER 2009
3. Careful selection and placement of external
layout
techniques).
A
50-
environment
is
components preserves the high frequency
normally not necessary onboard, and in fact a
performance of the THS4211. Resistors should
higher
impedance
environment
improves
be a very low reactance type. Surface-mount
distortion as shown in the distortion versus load
resistors work best and allow a tighter overall
plots.
With
a
characteristic
board
trace
layout.
Metal-film
and
carbon
composition,
impedance defined on the basis of board material
axially-leaded resistors can also provide good
and trace dimensions, a matching series resistor
high frequency performance. Again, keep their
into the trace from the output of the THS4211 is
leads and PCB trace length as short as possible.
used as well as a terminating shunt resistor at the
Never
use
wire-wound
type
resistors
in
a
input of the destination device. Remember also
high-frequency application. Since the output pin
that the terminating impedance is the parallel
and inverting input pin are the most sensitive to
combination of the shunt resistor and the input
parasitic
capacitance,
always
position
the
impedance of the destination device: this total
feedback and series output resistor, if any, as
effective impedance should be set to match the
close as possible to the output pin. Other network
trace impedance. If the 6-dB attenuation of a
components,
such
as
noninverting
doubly-terminated
transmission
line
is
input-termination resistors, should also be placed
unacceptable,
a
long
trace
can
be
close
to
the
package.
Where
double-side
series-terminated at the source end only. Treat
component
mounting
is
allowed,
place
the
the trace as a capacitive load in this case and set
feedback resistor directly under the package on
the series resistor value as shown in the plot of
the other side of the board between the output
R(ISO) vs capacitive load (See Figure 88). This
and inverting input pins. Even with a low parasitic
setting does not preserve signal integrity or a
capacitance
shunting
the
external
resistors,
doubly-terminated line. If the input impedance of
excessively high resistor values can create
the destination device is low, there is some signal
significant time constants that can degrade
attenuation due to the voltage divider formed by
performance.
Good
axial
metal-film
or
the series output into the terminating impedance.
surface-mount resistors have approximately 0.2
5. Socketing a high speed part like the THS4211
pF in shunt with the resistor. For resistor values >
is not recommended. The additional lead length
2.0 k
, this parasitic capacitance can add a pole
and pin-to-pin capacitance introduced by the
and/or a zero below 400 MHz that can effect
socket
can
create
a
troublesome
parasitic
circuit operation. Keep resistor values as low as
network which can make it almost impossible to
possible,
consistent
with
load
driving
achieve a smooth, stable frequency response.
considerations. A good starting point for design is
Best results are obtained by soldering the
to set the Rf to 249 for low-gain, noninverting
THS4211 onto the board.
applications. This setting automatically keeps the
resistor noise terms low and minimizes the effect
PowerPAD DESIGN CONSIDERATIONS
of their parasitic capacitance.
The THS4211 and THS4215 are available in a
4. Connections to other wideband devices on
thermally-enhanced PowerPAD family of packages.
the board may be made with short direct
These packages are constructed using a downset
traces or through onboard transmission lines.
leadframe upon which the die is mounted [see
For short connections, consider the trace and the
Figure 89(a) and Figure 89(b)]. This arrangement
input to the next device as a lumped capacitive
results in the lead frame being exposed as a thermal
load. Relatively wide traces (50 mils to 100 mils)
pad
on
the
underside
of
the
package
[see
should be used, preferably with ground and
Figure 89(c)]. Because this thermal pad has direct
power planes opened up around them. Estimate
thermal contact with the die, excellent thermal
the total capacitive load and set RISO from the
performance can be achieved by providing a good
plot of recommended RISO vs capacitive load
thermal path away from the thermal pad.
(See Figure 88). Low parasitic capacitive loads (<
4 pF) may not need an R(ISO), since the THS4211
The PowerPAD package allows both assembly and
is nominally compensated to operate with a 2-pF
thermal management in one manufacturing operation.
parasitic load. Higher parasitic capacitive loads
During the surface-mount solder operation (when the
without an R(ISO) are allowed as the signal gain
leads are being soldered), the thermal pad can also
increases
(increasing
the
unloaded
phase
be soldered to a copper area underneath the
margin). If a long trace is required, and the 6-dB
package. Through the use of thermal paths within this
signal
loss
intrinsic
to
a
doubly-terminated
copper area, heat can be conducted away from the
transmission line is acceptable, implement a
package into either a ground plane or other heat
matched
impedance
transmission
line
using
dissipating device.
microstrip or stripline techniques (consult an ECL
design handbook for microstrip and stripline
Copyright 2002–2009, Texas Instruments Incorporated
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Product Folder Link(s): THS4211 THS4215
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THS4215DRB 制造商:Rochester Electronics LLC 功能描述:- Bulk
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