- 您现在的位置：买卖IC网 > PDF目录69493 > TLC32046IFN (TEXAS INSTRUMENTS INC) SPECIALTY ANALOG CIRCUIT, PQCC28 PDF资料下载
参数资料
| 型号： | TLC32046IFN |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQCC28 |
| 封装： | PLASTIC, CC-28 |
| 文件页数： | 6/56页 |
| 文件大小： | 274K |
| 代理商： | TLC32046IFN |
第1页第2页第3页第4页第5页当前第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页
1–8
1.5
Terminal Functions (continued)
TERMINAL
I/O
DESCRIPTION
NAME
NO.
I/O
DESCRIPTION
DGTL
9
Digital ground for all internal logic circuits. Not internally connected to ANLG GND.
FSD
1
O
Frame sync data. The FSD output remains high during primary communication. In the
dual-word (telephone interface) mode, FSD is identical to FSX during secondary
communication.
WORD-BYTE
I
WORD-BYTE allows differentiation between the word and byte data format (see
DATA-DR/CONTROL and Table 2-1 for details).
FSR
4
O
Frame sync receive. FSR is held low during bit transmission. When FSR goes low, the
TMS320 serial port begins receiving bits from the AIC via DR of the AIC. The most
significant DR bit is present on DR before FSR goes low (see Serial Port Sections and
Internal Timing Configuration Diagrams).
FSX
14
O
Frame sync transmit. When FSX goes low, the TMS320 serial port begins transmitting
bits to the AIC via DX of the AIC. FSX is held low during bit transmission (see Serial Port
Sections and Internal Timing Configuration Diagrams).
IN+
26
I
Noninverting input to analog input amplifier stage
IN –
25
I
Inverting input to analog input amplifier stage
MSTR CLK
6
I
The master clock signal is used to derive all the key logic signals of the AIC, such as
the shift clock, the switched-capacitor filter clocks, and the A/D and D/A timing signals.
The Internal Timing Configuration diagram shows how these key signals are derived.
The frequencies of these signals are synchronous submultiples of the master clock
frequency to eliminate unwanted aliasing when the sampled analog signals are
transferred between the switched-capacitor filters and the ADC and DAC converters
(see the Internal Timing Configuration).
OUT+
22
O
Noninverting output of analog output power amplifier. OUT+ drives transformer hybrids
or high-impedance loads directly in a differential or a single-ended configuration.
OUT–
21
O
Inverting output of analog output power amplifier. OUT– is functionally identical with and
complementary to OUT+.
REF
8
I/O
The internal voltage reference is brought out on REF. An external voltage reference can
be applied to REF to override the internal voltage reference.
RESET
2
I
A reset function is provided to initialize TA, TA’, TB, RA, RA’, RB (see Figure 2-1), and
the control registers. This reset function initiates serial communications between the
AIC and DSP. The reset function initializes all AIC registers, including the control
register. After a negative-going pulse on RESET, the AIC registers are initialized to
provide a 16-kHz data conversion rate for a 10.368-MHz master clock input signal. The
conversion rate adjust registers, TA’ and RA’, are reset to 1. The CONTROL register bits
are reset as follows (see AIC DX Data Word Format section):
D11 = 0, D10 = 0, D9 = 1, D7 = 1, D6 = 1, D5 = 1, D4 = 0, D3 = 0, D2 = 1
The shift clock (SCLK) is held high during RESET.
This initialization allows normal serial-port communication to occur between the AIC
and the DSP.
SHIFT CLK
10
O
The shift clock signal is obtained by dividing the master clock signal frequency by four.
SHIFT CLK is used to clock the serial data transfers of the AIC.
VDD
7
Digital supply voltage, 5 V
±5%
VCC+
20
Positive analog supply voltage, 5 V
±5%
VCC –
19
Negative analog supply voltage, – 5 V
±5%
相关PDF资料 |
PDF描述 |
|---|---|
| TLC32046MFKR | SPECIALTY ANALOG CIRCUIT, CQCC28 |
| TLC32046IFNR | SPECIALTY ANALOG CIRCUIT, PQCC28 |
| TLC32046MJ | SPECIALTY ANALOG CIRCUIT, CDIP28 |
| TLC320AD50CDW | SPECIALTY ANALOG CIRCUIT, PDSO28 |
| TLC320AD52CDWR | SPECIALTY ANALOG CIRCUIT, PDSO28 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TLC32046IN | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TLC32046M | 制造商:TI 制造商全称:Texas Instruments 功能描述:Wide-Band Analog Interface Circuit |
| TLC32047 | 制造商:TI 制造商全称:Texas Instruments 功能描述:Wide-Band Analog Interface Circuit |
| TLC32047C | 制造商:TI 制造商全称:Texas Instruments 功能描述:Wide-Band Analog Interface Circuit |
| TLC32047CFN | 制造商:TI 制造商全称:Texas Instruments 功能描述:Wide-Band Analog Interface Circuit |
发布紧急采购，3分钟左右您将得到回复。