- 您现在的位置：买卖IC网 > PDF目录98250 > TLV1571IPWG4 (TEXAS INSTRUMENTS INC) 1-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24 PDF资料下载
参数资料
| 型号： | TLV1571IPWG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | ADC |
| 英文描述： | 1-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24 |
| 封装： | GREEN, TSSOP-24 |
| 文件页数： | 33/33页 |
| 文件大小： | 627K |
| 代理商： | TLV1571IPWG4 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页当前第33页
TLV1571, TLV1578
2.7 V TO 5.5 V, 1-/8-CHANNEL, 10-BIT,
PARALLEL ANALOG-TO-DIGITAL CONVERTERS
SLAS170D –MARCH 1999 – REVISED JULY 2000
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
start of conversion mechanism
There are two ways to convert data: hardware and software. In the hardware conversion mode the ADC begins
sampling at the falling edge of CSTART and begins conversion at the rising edge of CSTART. Software start
mode ADC samples for 6 clocks, then conversion occurs for ten clocks. The total sampling and conversion
process lasts only 16 clocks in this case. If RD is not detected during the next clock cycle, the ADC automatically
proceeds to a power-down state. Data is valid on the rising edge of INT in both conversion modes.
hardware CSTART conversion
external clock
With CS low and WR low, data is written into the ADC. The sampling begins at the falling edge of CSTART and
conversion begins at the rising edge of CSTART. At the end of conversion, EOC goes from low to high, telling
the host that conversion is ready to be read out. The external clock is active and is used as the reference at all
times. With this mode, it is required that CSTART is not applied at the rising edge of the clock (see Figure 4).
相关PDF资料 |
PDF描述 |
|---|---|
| TLV1571CDWG4 | 1-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24 |
| TLV1578CDARG4 | 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO32 |
| TLV1571IDW | 1-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24 |
| TLV1571CPW | 1-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24 |
| TLV1571IDWR | 1-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TLV1572 | 制造商:TI 制造商全称:Texas Instruments 功能描述:2.7 V TO 5.5 V, 10-BIT, 1.25 MSPS SERIAL ANALOG-TO-DIGITAL CONVERTER WITH AUTO-POWERDOWN |
| TLV1572CD | 功能描述:模数转换器 - ADC 10bit A/D RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| TLV1572CDG4 | 功能描述:模数转换器 - ADC 10-Bit 1.25 MSPS 1-Ch DSP RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| TLV1572CDR | 功能描述:模数转换器 - ADC 10-Bit 1.25 MSPS 1-Ch DSP RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| TLV1572CDRG4 | 功能描述:模数转换器 - ADC 10-Bit 1.25 MSPS 1-Ch DSP RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
发布紧急采购，3分钟左右您将得到回复。