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| 型号： | TLV320AIC31IRHBT |
| 厂商： | Texas Instruments |
| 文件页数： | 9/84页 |
| 文件大小： | 0K |
| 描述： | IC CODEC STEREO AUDIO 32-QFN |
| 标准包装： | 1 |
| 类型： | 立体声音频 |
| 数据接口： | PCM 音频接口 |
| 分辨率（位）： | 24 b |
| ADC / DAC 数量： | 2 / 2 |
| 三角积分调变： | 是 |
| S/N 比，标准 ADC / DAC (db)： | 92 / 100 |
| 动态范围，标准 ADC / DAC (db)： | 92 / 100 |
| 电压 - 电源，模拟： | 2.7 V ~ 3.6 V |
| 电压 - 电源，数字： | 1.65 V ~ 1.95 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN 裸露焊盘（5x5） |
| 包装： | 标准包装 |
| 配用： | 296-19476-ND - KIT EVAL/DEMO FOR TLV320AIC31 296-19475-ND - MODULE EVAL FOR TLV320AIC31 |
| 其它名称： | 296-19422-6 |
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OVERVIEW
HARDWARE RESET
DIGITAL CONTROL SERIAL INTERFACE
I
2C CONTROL INTERFACE
www.ti.com ............................................................................................................................................. SLAS497C – AUGUST 2006 – REVISED DECEMBER 2008
The TLV320AIC31 is a highly flexible, low-power, stereo audio codec with extensive feature integration, intended
for applications in smartphones, PDAs, and portable computing, communication, and entertainment applications.
Available in a 5 x 5 mm, 32-lead QFN, the product integrates a host of features to reduce cost, board space, and
power consumption in space-constrained, battery-powered, portable applications.
The TLV320AIC31 consists of the following blocks:
Stereo audio multi-bit delta-sigma DAC (8 kHz to 96 kHz)
Stereo audio multi-bit delta-sigma ADC (8 kHz to 96 kHz)
Programmable digital audio effects processing (3D, bass/treble/midrange, EQ, de-emphasis)
Four audio inputs
Four high-power audio output drivers (headphone/speaker drive capability)
Two fully differential line output drivers
Fully programmable PLL
Headphone/headset jack detection with interrupt
The TLV320AIC31 requires a hardware reset after power-up for proper operation. After all power supplies are at
their specified values, the RESET pin must be driven low for at least 10 ns. If this reset sequence is not
performed, the TLV320AIC31 may not respond properly to register reads/writes.
The register map of the TLV320AIC31 actually consists of multiple pages of registers, with each page containing
128 registers. The register at address 0 on each page is used as a page-control register, and writing to this
register determines the active page for the device. All subsequent read/write operations will access the page that
is active at the time, unless a register write is performed to change the active page. Only two pages of registers
are implemented in this product, with the active page defaulting to page 0 upon device reset.
For example, at device reset, the active page defaults to page 0, and thus all register read/write operations for
addresses 1 to 127 will access registers in page 0. If registers on page 1 must be accessed, the user must write
the 8-bit sequence 0x01 to register 0, the page control register, to change the active page from page 0 to page 1.
After this write, it is recommended the user also read back the page control register, to safely ensure the change
in page control has occurred properly. Future read/write operations to addresses 1 to 127 will now access
registers in page 1. When page 0 registers must be accessed again, the user writes the 8-bit sequence 0x00 to
register 0, the page control register, to change the active page back to page 0. After a recommended read of the
page control register, all further read/write operations to addresses 1 to 127 will now access page 0 registers
again.
The TLV320AIC31 supports the I2C control protocol using 7-bit addressing and is capable of both standard and
fast modes. For I2C fast mode, note that the minimum timing for each of tHD-STA, tSU-STA, and tSU-STO is 2.0
us, as seen in Figure 15. The TLV320AIC31 will respond to the I2C address of 0011000. I2C is a two-wire,
open-drain interface supporting multiple devices and masters on a single bus. Devices on the I2C bus only drive
the bus lines LOW by connecting them to ground; they never drive the bus lines HIGH. Instead, the bus wires
are pulled HIGH by pull-up resistors, so the bus wires are HIGH when no device is driving them LOW. This way,
two devices cannot conflict; if two devices drive the bus simultaneously, there is no driver contention.
Copyright 2006–2008, Texas Instruments Incorporated
17
Product Folder Link(s): TLV320AIC31
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相关代理商/技术参数 |
参数描述 |
|---|---|
| TLV320AIC31IRHBT | 制造商:Texas Instruments 功能描述:IC CODEC STEREO AUDIO 32-VQFN |
| TLV320AIC31IRHBTG4 | 功能描述:接口—CODEC Lo-Pwr Ster Codec for Port Aud/Teleph RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel |
| TLV320AIC32 | 制造商:BB 制造商全称:BB 功能描述:LOW POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY |
| TLV320AIC32_07 | 制造商:BB 制造商全称:BB 功能描述:LOW POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY |
| TLV320AIC3204 | 制造商:TI 制造商全称:Texas Instruments 功能描述:Ultra Low Power Stereo Audio Codec |
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