- 您现在的位置：买卖IC网 > PDF目录199412 > TMP86CH09NG 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PDIP32 PDF资料下载
参数资料
| 型号： | TMP86CH09NG |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PDIP32 |
| 封装： | 0.400 INCH, 1.78 MM PITCH, LEAD FREE, PLASTIC, SDIP-32 |
| 文件页数： | 65/120页 |
| 文件大小： | 1743K |
| 代理商： | TMP86CH09NG |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页当前第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页
Page 38
3. Interrupt Control Circuit
3.4 Interrupt Sequence
TMP86FH09ANG
Note 1: a: Return address entry address, b: Entry address, c: Address which RETI instruction is stored
Note 2: On condition that interrupt is enabled, it takes 38/fc [s] or 38/fs [s] at maximum (If the interrupt latch is set at the first
machine cycle on 10 cycle instruction) to start interrupt acceptance processing since its interrupt latch is set.
Figure 3-1 Timing Chart of Interrupt Acceptance/Return Interrupt Instruction
Example: Correspondence between vector table address for INTTBT and the entry address of the interrupt
service program
A maskable interrupt is not accepted until the IMF is set to “1” even if the maskable interrupt higher than the
level of current servicing interrupt is requested.
In order to utilize nested interrupt service, the IMF is set to “1” in the interrupt service program. In this case,
acceptable interrupt sources are selectively enabled by the individual interrupt enable flags.
To avoid overloaded nesting, clear the individual interrupt enable flag whose interrupt is currently serviced,
before setting IMF to “1”. As for non-maskable interrupt, keep interrupt service shorten compared with length
between interrupt requests; otherwise the status cannot be recovered as non-maskable interrupt would simply
nested.
3.4.2 Saving/restoring general-purpose registers
During interrupt acceptance processing, the program counter (PC) and the program status word (PSW,
includes IMF) are automatically saved on the stack, but the accumulator and others are not. These registers are
saved by software if necessary. When multiple interrupt services are nested, it is also necessary to avoid using
the same data memory area for saving registers. The following methods are used to save/restore the general-
purpose registers.
3.4.2.1 Using PUSH and POP instructions
If only a specific register is saved or interrupts of the same source are nested, general-purpose registers
can be saved/restored using the PUSH/POP instructions.
a
b
a
c + 1
Execute
instruction
SP
PC
Execute
instruction
n
2
n - 3
n
2n 1
n
1
n
a + 2
a + 1
c + 2
b + 3
b + 2
b + 1
a + 1
a
1
Execute RETI instruction
Interrupt acceptance
Execute
instruction
Interrupt service task
1-machine cycle
Interrupt
request
Interrupt
latch (IL)
IMF
D2H
03H
D203H
D204H
06H
Vector table address
Entry address
0FH
Vector
Interrupt
service
program
FFF2H
FFF3H
相关PDF资料 |
PDF描述 |
|---|---|
| TMP86CM29BU | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP64 |
| TMP86FH09NG | 8-BIT, FLASH, 16 MHz, MICROCONTROLLER, PDIP32 |
| TMP86FS49BUG | 8-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP64 |
| TMP86PS25F | 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP100 |
| TMP87C800N | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP64 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TMP86CH12MG | 制造商:TOSHIBA 制造商全称:Toshiba Semiconductor 功能描述:8 Bit Microcontroller |
| TMP86CH21AUG | 制造商:TOSHIBA 制造商全称:Toshiba Semiconductor 功能描述:8 Bit Microcontroller |
| TMP86CH21F | 制造商:TOSHIBA 制造商全称:Toshiba Semiconductor 功能描述:CMOS 8-Bit Microcontroller |
| TMP86CH21U | 制造商:TOSHIBA 制造商全称:Toshiba Semiconductor 功能描述:CMOS 8-Bit Microcontroller |
| TMP86CH22UG | 制造商:TOSHIBA 制造商全称:Toshiba Semiconductor 功能描述:8 Bit Microcontroller |
发布紧急采购，3分钟左右您将得到回复。