参数资料
型号: TMS29LF040-80C5DBWE
厂商: TEXAS INSTRUMENTS INC
元件分类: PROM
英文描述: 512K X 8 FLASH 3V PROM, 80 ns, PDSO32
封装: 8 X 14 MM, PLASTIC, TSOP-32
文件页数: 36/38页
文件大小: 495K
代理商: TMS29LF040-80C5DBWE
TMS29LF040, TMS29VF040
524288 BY 8-BIT
FLASH MEMORIES
SMJS825D – SEPTEMBER 1995 – REVISED JUNE 1998
7
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
command definitions (continued)
Table 3. Command Definitions
COMMAND
BUS
CYCLES
1ST CYCLE
ADDR DATA
2ND CYCLE
ADDR DATA
3RD CYCLE
ADDR DATA
4TH CYCLE
ADDR DATA
5TH CYCLE
ADDR DATA
6TH CYCLE
ADDR DATA
Read
1
RA
RD
Reset/Read§
2
XXXXh F0h
RA
RD
Reset/Read§
4
5555h AAh
2AAAh 55h
5555h F0h
RA
RD
Algorithm selection
4
5555h AAh
2AAAh 55h
5555h 90h
RA
RD
Byte program
4
5555h AAh
2AAAh 55h
5555h A0h
PA
PD
Chip erase
6
5555h AAh
2AAAh 55h
5555h 80h
5555h AAh
2AAAh 55h
5555h 10h
Sector erase
6
5555h AAh
2AAAh 55h
5555h 80h
5555h AAh
2AAAh 55h
SA 30h
Sector-erase suspend
XXXXh B0h
Erase-suspend valid during sector-erase operation
Sector-erase resume
XXXXh 30h
Erase-resume valid only after erase-suspend
RA = Address of the location to be read
PA
= Address of the location to be programmed
SA = Address of the sector to be erased
Addresses A16, A17, and A18 select one of eight sectors
RD = Data to be read at selected address location
PD = Data to be programmed at selected address location
Address pins A15, A16, A17, A18 = VIL or VIH for all bus cycle addresses except for program address (PA), sector address (SA), and read address
(RA).
No command cycles are required when the device is in read mode.
§ The reset command is required to return to the read mode when the device is in the algorithm-selection mode or if DQ5 goes high.
reset/read command
The read mode is activated by writing either of the two reset command sequences into the command register.
The device remains in this mode until another valid command sequence is input into the command register.
Memory data is available in the read mode and can be read with standard microprocessor read-cycle timing.
On power up, the device defaults to the read mode; therefore, a reset command sequence is not required and
memory data is available.
algorithm-selection command
The algorithm-selection command allows access to a binary code that matches the device with the proper
programming and erase-command operations. After writing the three-bus-cycle command sequence, the first
byte of the algorithm-selection code (97h) can be read from address XX00h. The second byte of the code (94h)
can be read from address XX01h (see Table 2). This mode remains in effect until another valid command
sequence is written to the device.
Sector-protection can be determined using the algorithm-selection command. After issuing the three-bus-cycle
command sequence, the sector-protection status can be read on DQ0. Set address pins A0 = VIL and A1 = VIH.
The sector address pins A16, A17, and A18 select the sector to be checked. The remaining address pins can
be VIL or VIH. If the sector selected is protected, DQ0 outputs a 1. If the sector selected is not protected, DQ0
outputs a 0. This mode remains in effect until another valid command sequence is written to the device.
byte-program command
Byte-programming is a four-bus-cycle command sequence. The first three bus cycles put the device into the
program-setup state. The fourth bus cycle loads the address location and the data to be programmed into the
device. The addresses are latched on the falling edge of W and the data is latched on the rising edge of W inthe
fourth bus cycle. The rising edge of W starts the byte-program operation. The embedded byte-programming
function automatically provides voltage and timing to program and to verify the cell margin. Any further
commands written to the device during the program operation are ignored.
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