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参数资料
| 型号： | TPS2393APWRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO14 |
| 封装： | GREEN, PLASTIC, TSSOP-14 |
| 文件页数： | 27/30页 |
| 文件大小： | 665K |
| 代理商： | TPS2393APWRG4 |
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TPS2393A
SLUS610 JULY 2004
6
www.ti.com
PIN ASSIGNMENTS
IRAMP: Programming input for setting the inrush current slew rate. An external capacitor connected between
this pin and VIN establishes the load current slew rate whenever power to the load is enabled. The device
charges the external capacitor to establish the reference input to the LCA. The closed-loop control of the LCA
and pass FET acts to maintain the current sense voltage at ISENS at the reference potential. Since the sense
voltage is developed as the drop across a resistor, the load current slew rate is set by the voltage ramp rate at
the IRAMP pin. When the output is disabled for any reason (e.g., EN deassertion, voltage or current fault, etc.),
the capacitor is discharged and held low to initialize it for the next turn-on event.
ISENS: Current sense input. An external low-value resistor connected between this pin and VIN is used to feed
back current magnitude information to the TPS2393A. There are two internal device thresholds associated with
the voltage at the ISENS pin. During ramp-up of the load’s input capacitance, or during other periods of
excessive demand, the HSPM acts to limit this voltage to 40 mV. Whenever the LCA is in current regulation
mode, the capacitor at FLTTIME is charged to activate the timer. If, when the LCA is driving to its supply rail,
a fast-acting fault such as a short-circuit, causes the ISENS voltage to exceed 100 mV (the overload threshold),
the GATE pin is pulled low rapidly, bypassing the fault timer. Overload faults are not immediately latched. Once
the current drops below the 100-mV threshold due to the GATE pull-down, control is quickly returned to the LCA
to turn the FET back on in current limit mode and test the persistance of the fault.
OVLO: Voltage sense input for supply overvoltage lockout (OVLO) protection. Overvoltage protection can be
achieved by applying a divided down sample of the input supply voltage to this pin. In order to turn on gate drive
to the external FET, the OVLO pin must be below the 1.4-V typical threshold, while all other input qualifications
are met. If the OVLO pin is raised above this threshold, as with increasing supply voltage, the GATE output is
pulled low, interrupting the supply to the load. An internal 10-
A pull-up is switched to this pin when the threshold
is exceeded, providing a mechanism for setting the amount of OVLO hysteresis along with the trip threshold.
PG: Open-drain, active-low indication of load power good condition. The TPS2393A device defines power good
as the voltage at the DRAINSNS pin below the power good threshold, and the voltage at the IRAMP pin being
above 5 V. This assures that full programmed sourcing current is available to the load prior to declaring power
good, even with very slow current ramp rates. The additional protection prevents potential discharging of the
module bulk capacitance during load turn-on.
RTN: Positive supply input for the TPS2393A. For negative voltage systems, the supply pin connects directly
to the return node of the input power bus. Internal regulators step down the input voltage to generate the various
supply levels used by the TPS2393A.
UVLO: Voltage sense input for supply uvervoltage lockout (UVLO) protection. Undervoltage protection can be
achieved by applying a divided down sample of the input supply voltage to this pin. In order to turn on the gate
drive to the external FET, the UVLO pin must be above the 1.4-V typical threshold, while all other input
qualifications are met. If the UVLO pin drops below this threshold, as with decreasing supply voltage, the GATE
output is pulled low, interrupting the supply to the load. An internal 10-
A pullup is switched to this pin when
the threshold is exceeded, providing a mechanism for setting the amount of UVLO hysteresis along with the
trip threshold.
For proper operation, a minimum 1500-pF capacitor, connected between the UVLO and VIN pins, is required.
VIN: Negative supply input and reference pin for the TPS2393A. This pin connects directly to the input supply
negative rail. The input and output pins and all internal circuitry are referenced to this pin, so it is essentially the
GND or VSS pin of the device.
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| TPS2393DBTR | 功能描述:热插拔功率分布 Full Featured -48V Industral Temp. RoHS:否 制造商:Texas Instruments 产品:Controllers & Switches 电流限制: 电源电压-最大:7 V 电源电压-最小:- 0.3 V 工作温度范围: 功率耗散: 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Tube |
| TPS2393DBTRG4 | 功能描述:热插拔功率分布 -48V Hot Swap G179 Pwr Mgr Ind Temp RoHS:否 制造商:Texas Instruments 产品:Controllers & Switches 电流限制: 电源电压-最大:7 V 电源电压-最小:- 0.3 V 工作温度范围: 功率耗散: 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Tube |
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