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参数资料
| 型号： | TPS40054PWPRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 稳压器 |
| 英文描述： | SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封装： | GREEN, PLASTIC, HTSSOP-16 |
| 文件页数： | 34/35页 |
| 文件大小： | 866K |
| 代理商： | TPS40054PWPRG4 |
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(
) (
)
KFF
IN(min)
KFF
T
R
V
58.14
R
1340
=
-
+
W
(2)
fSW - Switching Frequency - kHz
SWITCHING FREQUENCY
vs
TIMING RESISTANCE
R
T
-
T
iming
Resistance
-
k
100
0
300
400
600
700
900 1000
300
400
600
500
200
500
800
100
0
200
300
400
500
600
200
400
600
800
1000
100
700
300
500
700
900
FEED-FORWARD IMPEDANCE
vs
SWITCHING FREQUENCY
R
K
F
-
Feed-Forward
Impedance
-
k
fSW - Switching Frequency - kHz
VIN = 25 V
VIN = 15 V
VIN = 9 V
UVLO OPERATION
SLUS593F – DECEMBER 2003 – REVISED SEPTEMBER 2008 ...................................................................................................................................... www.ti.com
where
V
IN(min) is the ensured minimum start-up voltage (the actual start-up voltage is nominally about 10% lower at
25°C)
R
T is the timing resistance in k
V
KFF is the voltage at the KFF pin; (Pin 1 (typical value is 3.48 V)
The curve showing the RKFF required for a given switching frequency, fSW, and VUVLO is shown in Figure 3.
For low-input voltage and high duty-cycle applications, the voltage feed-forward may limit the duty cycle
prematurely. This does not occur for most applications. The voltage control loop controls the duty cycle and
regulates the output voltage. For more information on large duty cycle operation, refer to Application Note
(SLUA310), Effect of Programmable UVLO on Maximum Duty Cycle.
Figure 2.
Figure 3.
The TPS4005x uses variable (user-programmable) UVLO protection. See the Programming the Ramp Generator
section for more information on setting the UVLO voltage. The UVLO circuit holds the soft-start low until the input
voltage has exceeded the user-programmable undervoltage threshold.
The TPS4005x uses the feed-forward pin, KFF, as a user-programmable low-line UVLO detection. This variable
low-line UVLO threshold compares the PWM ramp duration to the oscillator clock period. An undervoltage
condition exists if the TPS4005x receives a clock pulse before the ramp has reached 90% of its full amplitude.
The ramp duration is a function of the ramp slope, which is directly related to the current into the KFF pin. The
KFF current is a function of the input voltage and the resistance from KFF to the input voltage. The KFF resistor
can be referenced to the oscillator frequency as descibed in Equation 2.
The programmable UVLO function uses a three-bit counter to prevent spurious shut-downs or turn-ons due to
spikes or fast line transients. When the counter reaches a total of seven counts in which the ramp duration is
shorter than the clock cycle, a powergood signal is asserted and a soft-start initiated, and the upper and lower
MOSFETS are turned off.
8
Copyright 2003–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS40054 TPS40055 TPS40057
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