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| 型号： | TPS40054PWPRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 稳压器 |
| 英文描述： | SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封装： | GREEN, PLASTIC, HTSSOP-16 |
| 文件页数： | 35/35页 |
| 文件大小： | 866K |
| 代理商： | TPS40054PWPRG4 |
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UDG-02132
Clock
PWM RAMP
PowerGood
VIN
UVLO Threshold
1 2 3 4 5 6 7
1 2
10
0.2
0
20
15
25
30
40
35
0.4
1.0
0.8
1.2
0.6
V
UVLO
– Undervoltage Lockout Threshold – V
V
U
V
L
O
–
H
y
s
te
r
e
s
is
–
V
www.ti.com ...................................................................................................................................... SLUS593F – DECEMBER 2003 – REVISED SEPTEMBER 2008
Once the soft-start is initiated, the UVLO circuit must see a total count of seven cycles in which the ramp
duration is longer than the clock cycle before an undervoltage condition is declared. (See Figure 4).
Figure 4. Undervoltage Lockout Operation
The tolerance on the UVLO set point also affects the maximum duty cycle achievable. If the UVLO starts the
device at 10% below the nominal start-up voltage, the maximum duty cycle is reduced approximately 10% at the
nominal start-up voltage.
The impedance of the input voltage can cause the input voltage, at the controller, to sag when the converter
starts to operate and draw current from the input source. Therefore, there is voltage hysteresis that prevents
nuisance shutdowns at the UVLO point. With RT chosen to select the operating frequency and RKFF chosen to
select the start-up voltage, the approximate amount of hysteresis voltage is shown in Figure 5.
UNDERVOLTAGE LOCKOUT THRESHOLD
vs
HSYTERESIS
Figure 5.
Copyright 2003–2008, Texas Instruments Incorporated
9
Product Folder Link(s): TPS40054 TPS40055 TPS40057
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