SLUS859B
– OCTOBER 2008 – REVISED FEBRUARY 2011
CURRENT MODE COMPENSATION DESIGN
To simplify design efforts using the TPS54233, the typical designs for common applications are listed in
Table 1.
For designs using ceramic output capacitors, proper derating of ceramic output capacitance is recommended
when doing the stability analysis. This is because the actual ceramic capacitance drops considerably from the
nominal value when the applied voltage increases. Advanced users may refer to the Step by Step Design
Procedure in the Application Information section for the detailed guidelines or use SwitcherPro
Software tool
Table 1. Typical Designs (Referring to Simplified Schematic on page 1)
VIN
VOUT
Fsw
Lo
Co
RO1
RO2
C2
C1
R3
(V)
(kHz)
(
μH)
(k
)
(k
)
(pF)
(k
)
12
5
300
22
Ceramic 47
μF
10
1.91
68
1800
21
12
3.3
300
15
Ceramic 47
μF
10.2
3.24
47
4700
21
12
1.8
300
10
Ceramic 100
μF x 2
10
8.06
100
4700
21
12
0.9
300
6.8
Ceramic 100
μFx2
10
80.6
100
4700
21
12
5
300
22
Aluminum 330
μF/160 m
10
1.91
56
220
40.2
12
3.3
300
15
Aluminum 470
μF/160 m
10.2
3.24
220
30.9
12
1.8
300
10
SP 220
μF/12 m
10
8.06
100
4700
40.2
12
0.9
300
6.8
SP 220
μF/12 m
10
80.6
100
1800
21
OVERCURRENT PROTECTION AND FREQUENCY SHIFT
The TPS54233 implements current mode control that uses the COMP pin voltage to turn off the high-side
MOSFET on a cycle by cycle basis. Every cycle the switch current and the COMP pin voltage are compared;
when the peak inductor current intersects the COMP pin voltage, the high-side switch is turned off. During
overcurrent conditions that pull the output voltage low, the error amplifier responds by driving the COMP pin high,
causing the switch current to increase. The COMP pin has a maximum clamp internally, which limit the output
current.
The TPS54233 provides robust protection during short circuits. There is potential for overcurrent runaway in the
output inductor during a short circuit at the output. The TPS54233 solves this issue by increasing the off time
during short circuit conditions by lowering the switching frequency. The switching frequency is divided by 8, 4, 2,
and 1 as the voltage ramps from 0 V to 0.8 V on VSENSE pin. The relationship between the switching frequency
and the VSENSE pin voltage is shown in
Table 2.
Table 2. Switching Frequency Conditions
SWITCHING FREQUENCY
VSENSE PIN VOLTAGE
300 kHz
VSENSE
≥ 0.6 V
300 kHz / 2
0.6 V
> VSENSE ≥ 0.4 V
300 kHz / 4
0.4 V
> VSENSE ≥ 0.2 V
300 kHz / 8
0.2 V
> VSENSE
OVERVOLTAGE TRANSIENT PROTECTION
The TPS54233 incorporates an overvoltage transient protection (OVTP) circuit to minimize output voltage
overshoot when recovering from output fault conditions or strong unload transients. The OVTP circuit includes an
overvoltage comparator to compare the VSENSE pin voltage and internal thresholds. When the VSENSE pin
voltage goes above 109%
× Vref, the high-side MOSFET will be forced off. When the VSENSE pin voltage falls
below 107%
× Vref, the high-side MOSFET will be enabled again.
THERMAL SHUTDOWN
The device implements an internal thermal shutdown to protect itself if the junction temperature exceeds 165
°C.
The thermal shutdown forces the device to stop switching when the junction temperature exceeds the thermal
trip threshold. Once the die temperature decreases below 165
°C, the device reinitiates the power up sequence.
2008–2011, Texas Instruments Incorporated
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