参数资料
型号: TPS62410DRCR
厂商: Texas Instruments
文件页数: 15/33页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 0.8A 10SON
标准包装: 1
类型: 降压(降压)
输出类型: 可调式
输出数: 2
输出电压: 0.6 V ~ 6 V
输入电压: 2.5 V ~ 6 V
PWM 型: 电压模式
频率 - 开关: 2.25MHz
电流 - 输出: 800mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-VFDFN 裸露焊盘
包装: 标准包装
供应商设备封装: 10-SON 裸露焊盘(3x3)
产品目录页面: 1033 (CN2011-ZH PDF)
其它名称: 296-25488-6
www.ti.com
SLVS737 – FEBRUARY 2007
DETAILED DESCRIPTION (continued)
Hereupon the device starts switching again. The Power Save Mode is exited and PWM Mode entered in case
the output current exceeds the current IOUT_PFM_leave, or if the output voltage falls below a second
comparator threshold, called skip comparator low (Skip Comp Low) threshold. This skip comparator low
threshold is set to –2% below nominal Vout, and enables a fast transition from Power Save Mode to PWM Mode
during a load step. In Power Save Mode the quiescent current is reduced typically to 19 μ A for one converter and
32 μ A for both converters active. This single skip comparator threshold method in Power Save Mode results in a
very low output voltage ripple. The ripple depends on the comparator delay and the size of the output capacitor.
Increasing output capacitor values minimizes the output ripple. The Power Save Mode can be disabled through
the MODE/DATA pin set to high. Both converters then operate in fixed PWM mode. Power Save Mode
Enable/Disable applies to both converters.
Dynamic Voltage Positioning
This feature reduces the voltage under/overshoots at load steps from light to heavy load and vice versa. It is
activated in Power Save Mode operation. It provides more headroom for both the voltage drop at a load step,
and the voltage increase at a load throw-off. This improves load transient behavior.
At light loads, in which the converter operate in PFM Mode, the output voltage is regulated typically 1% higher
than the nominal value. In case of a load transient from light load to heavy load, the output voltage drops until it
reaches the skip comparator low threshold set to –2% below the nominal value and enters PWM mode. During a
load throw off from heavy load to light load, the voltage overshoot is also minimized due to active regulation
turning on the N-channel switch.
Smooth
+1%
PFM Mode
light load
increased load
PFM Mode
light load
Fast load transient
V OUT_NOM
PWM Mode
PWM Mode
medium/heavy load
PWM Mode
medium/heavy load
medium/heavy load
COMP_LOW threshold –1%
Figure 25. Dynamic Voltage Positioning
Soft Start
The two converters have an internal soft start circuit that limits the inrush current during start-up. During soft
start, the output voltage ramp up is controlled as shown in Figure 26 .
EN
95%
5%
V OUT
t Startup
t RAMP
Figure 26. Soft Start
15
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