参数资料
| 型号： | TPS81256SIPR |
| 厂商： | Texas Instruments |
| 文件页数： | 19/26页 |
| 文件大小： | 0K |
| 描述： | IC REG BOOST SYNC 5V 0.6A 9USIP |
| 标准包装： | 1 |
| 类型： | 升压（升压） |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 5V |
| 输入电压： | 2.5 V ~ 5.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 4MHz |
| 电流 - 输出： | 600mA |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 9-VBGA |
| 包装： | 标准包装 |
| 供应商设备封装： | 9-uSIP（2.6x2.9） |
| 其它名称： | 296-30558-6 |
10000
Capacitor Lifetime
vs
Capacitor Case Temperature
SLVSAZ9A – JUNE 2012 – REVISED AUGUST 2013
V Bias =5V
V Bias =4.35V
1000
100
10
1
0.1
V Bias =3.6V
V Bias =3V
0.01
20
40
60 80 100 120
140
Capacitor Case Temperature ( °C)
G000
Figure 26.
Failures caused by systematic degradation can be described by the Arrhenius model. The most critical
parameter (IR) is the Insulation Resistance (i.e. leakage current). The drop of IR below a lower limit (e.g. 1 M Ω )
is used as the failure criterion, see Figure 26 . It should be noted that the wear-out mechanisms occurring in the
MLCC capacitors are not reversible but cumulative over time.
PACKAGE SUMMARY
SIP PACKAGE
TOP VIEW
BOTTOM VIEW
YML
C1
C2
C3
LSB
D
B1
A1
B2
A2
C3
A3
CC
E
Code:
?
?
?
CC — Package marking Chip Code (see for more details)
YML — Y: Year, M: Month, L: Lot trace code
LSB — L: Lot trace code, S: Site code, B: Board locator
MicroSiP TM DC/DC MODULE PACKAGE DIMENSIONS
The TPS8125x device is available in an 8-bump ball grid array (BGA) package. The package dimensions are:
?
?
D = 2.575 ±0.05 mm
E = 2.925 ±0.05 mm
Copyright ? 2012–2013, Texas Instruments Incorporated
Product Folder Links: TPS81256
19
相关PDF资料 |
PDF描述 |
|---|---|
| TPS82673SIPR | IC REG BUCK SYNC 1.26V .6A 8USIP |
| TW-12-07-S-Q-435-130 | CONN HEADER QUAD 2MM 48POS GOLD |
| TW-25-06-S-D-430-090 | CONN HEADER DUAL 2MM 50POS GOLD |
| TW-30-07-G-D-563-SM-P | CONN HEADER DUAL 2MM 60POS GOLD |
| TW-32-03-L-D-250-150 | CONN HEADER DUAL 2MM 64POS GOLD |
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