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参数资料
| 型号： | TSPC860SRMZPU50D4 |
| 厂商： | E2V TECHNOLOGIES PLC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 50 MHz, RISC PROCESSOR, PBGA357 |
| 封装： | PLASTIC, BGA-357 |
| 文件页数： | 11/90页 |
| 文件大小： | 2351K |
| 代理商： | TSPC860SRMZPU50D4 |
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19
TSPC860
2129A–HIREL–08/02
PA[9]
L1TXDA
K18
Bidirectional
(Optional:
Open-drain)
General-Purpose I/O Port A Bit 11 — Bit 9 of the general-purpose
I/O port A.
L1TXDA — Transmit data output for the serial interface TDM port A.
L1TXDA has an open-drain capability.
PA[8]
L1RXDA
L17
Bidirectional
General-Purpose I/O Port A Bit 8 — Bit 8 of the general-purpose I/O
port A.
L1RXDA — Receive data input for the serial interface TDM port A.
PA[7]
CLK1
TIN1
L1RCLKA
BRGO1
M19
Bidirectional
General-Purpose I/O Port A Bit 7 — Bit 7 of the general-purpose I/O
port A.
CLK1 — One of eight clock inputs that can be used to clock SCCs
and SMCs.
TIN1 — Timer 1 external clock.
L1RCLKA — Receive clock for the serial interface TDM port A.
BRGO1 — Output clock of BRG1.
PA[6]
CLK2
TOUT1
BRGCLK1
M17
Bidirectional
General-Purpose I/O Port A Bit 6 — Bit 6 of the general-purpose I/O
port A.
CLK2 — One of eight clock inputs that can be used to clock SCCs
and SMCs.
TOUT1 — Timer 1 output.
BRGCLK1 — One of two external clock inputs of the BRGs.
PA[5]
CLK3
TIN2
L1TCLKA
BRGO2
N18
Bidirectional
General-Purpose I/O Port A Bit 5 — Bit 5 of the general-purpose I/O
port A.
CLK3 — One of eight clock inputs that can be used to clock SCCs
and SMCs.
TIN2 — Timer 2 external clock input.
L1TCLKA — Transmit clock for the serial interface TDM port A.
BRGO2 — Output clock of BRG2.
PA[4]
CLK4
TOUT2
Hi-Z
P19
Bidirectional
General-Purpose I/O Port A Bit 4 — Bit 4 of the general-purpose I/O
port A.
CLK4 — One of eight clock inputs that can be used to clock SCCs
and SMCs.
TOUT2 — Timer 2 output.
PA[3]
CLK5
TIN3
BRGO3
P17
Bidirectional
General-Purpose I/O Port A Bit 3 — Bit 3 of the general-purpose I/O
port A.
CLK5 — One of eight clock inputs that can be used to clock SCCs
and SMCs.
TIN3 — Timer 3 external clock input.
BRGO3 — Output clock of BRG3.
PA[2]
CLK6
TOUT3
L1RCLKB
BRGCLK2
R18
Bidirectional
General-Purpose I/O Port A Bit 2 — Bit 2 of the general-purpose I/O
port A.
CLK6 — One of eight clock inputs that can be used to clock the
SCCs and SMCs.
TOUT3 — Timer 3 output.
L1RCLKB — Receive clock for the serial interface TDM port B.
BRGCLK2 — One of the two external clock inputs of the BRGs.
Table 1. Signal Descriptions (Continued)
Name
Reset
Number
Type
Description
相关PDF资料 |
PDF描述 |
|---|---|
| TSPD11CGVRA0 | PUSHBUTTON SWITCH, SPST, MOMENTARY, 0.02A, 20VDC, THROUGH HOLE-RIGHT ANGLE |
| 2-1437573-9 | PUSHBUTTON SWITCH, SPDT, MOMENTARY, 0.02A, 20VDC, SURFACE MOUNT-RIGHT ANGLE |
| 3-1437573-4 | PUSHBUTTON SWITCH, SPST, MOMENTARY, 0.02A, 20VDC, THROUGH HOLE-RIGHT ANGLE |
| TSPF5400AS21 | 5 mm, 1 ELEMENT, INFRARED LED, 870 nm |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| TSPC860SRMZQU66D | 制造商:e2v technologies 功能描述:MPU RISC 32BIT 66MHZ 3.3V 357BGA - Trays |
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| TSPC860XRMZPU66D | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:Integrated Communication Processor |
| TSPC860XRMZQU66D | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:Integrated Communication Processor |
| TSPC860XRVZPU66D | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:Integrated Communication Processor |
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