参数资料
型号: TVP5150AZQCR
厂商: TEXAS INSTRUMENTS INC
元件分类: 颜色信号转换
英文描述: COLOR SIGNAL DECODER, PBGA48
封装: PLASTIC, BGA-48
文件页数: 13/74页
文件大小: 439K
代理商: TVP5150AZQCR
210
Step 5
9
I2C Acknowledge (slave)
A
Step 6
7
6
5
4
3
2
1
0
I2C Write data (master)
Data
Step 7
9
I2C Acknowledge (slave)
A
Step 8
0
I2C Stop (master)
P
Repeat steps 6 and 7 until all data have been written.
2.15.2 I2C Read Operation
The read operation consists of two phases. The first phase is the address phase. In this phase, an I2C master initiates
a write operation to the TVP5150A decoder by generating a start condition (S) followed by the TVP5150A I2C address,
in MSB first bit order, followed by a 0 to indicate a write cycle. After receiving acknowledges from the TVP5150A
decoder, the master presents the subaddress of the register or the first of a block of registers it wants to read. After
the cycle is acknowledged, the master terminates the cycle immediately by generating a stop condition (P).
Table 27. Read Address Selection
I2CSEL
READ ADDRESS
0
B9h
1
BBh
The second phase is the data phase. In this phase, an I2C master initiates a read operation to the TVP5150A decoder
by generating a start condition followed by the TVP5150A I2C address (as shown below for a read operation), in MSB
first bit order, followed by a 1 to indicate a read cycle. After an acknowledge from the TVP5150A decoder, the I2C
master receives one or more bytes of data from the TVP5150A decoder. The I2C master acknowledges the transfer
at the end of each byte. After the last data byte desired has been transferred from the TVP5150A decoder to the
master, the master generates a not acknowledge followed by a stop.
2.15.2.1 Read Phase 1
Step 1
0
I2C Start (master)
S
Step 2
7
6
5
4
3
2
1
0
I2C General address (master)
1
0
1
0
X
0
Step 3
9
I2C Acknowledge (slave)
A
Step 4
7
6
5
4
3
2
1
0
I2C Read register address (master)
addr
Step 5
9
I2C Acknowledge (slave)
A
Step 6
0
I2C Stop (master)
P
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