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参数资料
| 型号： | TVP5150AZQCR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 颜色信号转换 |
| 英文描述： | COLOR SIGNAL DECODER, PBGA48 |
| 封装： | PLASTIC, BGA-48 |
| 文件页数： | 21/74页 |
| 文件大小： | 439K |
| 代理商： | TVP5150AZQCR |
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218
2.20.4 Miscellaneous Control Register
Address
03h
Default
01h
7
6
5
4
3
2
1
0
VBKO
GPCL pin
GPCL I/O mode
select
Lock status
(HVLK)
YCbCr output
enable (TVPOE)
HSYNC, VSYNC/PALI,
AVID, FID/GLCO
output enable
Vertical blanking
on/off
Clock output
enable
VBKO (pin 27) function select:
0 = GPCL (default)
1 = VBLK
GPCL (data is output based on state of bit 5):
0 = GPCL outputs 0 (default)
1 = GPCL outputs 1
GPCL I/O mode select:
0 = GPCL is input (default)
1 = GPCL is output
Lock status (HVLK) (configured along with register 0Fh, please see Figure 28 for the relationship between the
configuration shared pins):
0 = Terminal VSYNC/PALI outputs the PAL indicator (PALI) signal and terminal FID/GLCO outputs the field
ID (FID) signal (default) (if terminals are configured to output PALI and FID in register 0Fh)
1 = Terminal VSYNC/PALI outputs the horizontal lock indicator (HLK) and terminal FID outputs the vertical
lock indicator (VLK) (if terminals are configured to output PALI and FID in register 0Fh)
These are additional functionalities that are provided for ease of use.
YCbCr output enable:
0 = Y(OUT7:0) high impedance (default)
1 = Y(OUT7:0) active
HSYNC, VSYNC/PALI, active video indicator (AVID), and FID/GLCO output enables:
0 = HSYNC, VSYNC/PALI, AVID, and FID/GLCO are high-impedance (default).
1 = HSYNC, VSYNC/PALI, AVID, and FID/GLCO are active.
Vertical blanking on/off:
0 = Vertical blanking (VBLK) off (default)
1 = Vertical blanking (VBLK) on
Clock output enable:
0 = SCLK output is high impedance.
1 = SCLK output is enabled (default).
NOTE: When enabling the outputs, ensure the clock output is not accidently disabled.
Table 211. Digital Output Control
Register 03h, Bit 3
(TVPOE)
Register C2h, Bit 2
(VDPOE)
YCbCr Output
Notes
0
X
High impedance
After both YCbCr output enable bits are programmed.
X
0
High impedance
After both YCbCr output enable bits are programmed.
1
Active
After both YCbCr output enable bits are programmed.
NOTE: VDPOE default is 1 and TVPOE default is 0.
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| TVP5150PBS | 功能描述:编码器、解码器、复用器和解复用器 VERY LOW POWER VIDEO DECODER RoHS:否 制造商:Micrel 产品:Multiplexers 逻辑系列:CMOS 位数: 线路数量（输入/输出）:2 / 12 传播延迟时间:350 ps, 400 ps 电源电压-最大:2.625 V, 3.6 V 电源电压-最小:2.375 V, 3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Tray |
| TVP5150PBS | 制造商:Texas Instruments 功能描述:IC DECODER VIDEO SMD |
| TVP5150PBSG4 | 功能描述:视频 IC VERY LOW POWER VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作电源电压:5 V 电源电流:80 mA 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-28 封装:Reel |
| TVP5150PBSR | 功能描述:视频 IC Very Low Power Video Decoder RoHS:否 制造商:Fairchild Semiconductor 工作电源电压:5 V 电源电流:80 mA 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-28 封装:Reel |
| TVP5150PBSRG4 | 制造商:Texas Instruments 功能描述: |
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