CHAPTER 6 CLOCK GENERATOR
User’s Manual U17260EJ6V0UD
157
Figure 6-12. Clock Generator Operation When Power Supply Voltage Is Turned On
(When 1.59 V POC Mode Is Set (Option Byte: POCMODE = 0))
Internal high-speed
oscillation clock (fRH)
CPU clock
High-speed
system clock (fXH)
(when X1 oscillation
selected)
Internal high-speed oscillation clock
High-speed system clock
Switched by
software
Subsystem clock (fSUB)
(when XT1 oscillation
selected)
Subsystem clock
X1 clock
oscillation stabilization time:
2
11/fX to 216/fXNote 4
Starting X1 oscillation
is set by software.
Starting XT1 oscillation
is set by software.
Reset processing
(11 to 45 s)
<3> Waiting for
voltage stabilization
Internal reset signal
0 V
1.59 V
(TYP.)
1.8 V
Notes 1, 2
0.5 V/ms
(MIN.)
Notes 1, 2
Power supply
voltage (VDD)
<1>
<2>
<4>
<5>
<4>
Note 3
(1.93 to 5.39 ms)
<1>
When the power is turned on, an internal reset signal is generated by the power-on-clear (POC) circuit.
<2> When the power supply voltage exceeds 1.59 V (TYP.), the reset is released and the internal high-speed
oscillator automatically starts oscillation.
<3> When the power supply voltage rises with a slope of 0.5 V/ms (MIN.), the CPU starts operation on the
internal high-speed oscillation clock after the reset is released and after the stabilization times for the voltage
of the power supply and regulator have elapsed, and then reset processing is performed.
<4> Set the start of oscillation of the X1 or XT1 clock via software (see (1) in 6.6.1 Example of controlling high-
speed system clock and (1) in 6.6.3 Example of controlling subsystem clock).
<5> When switching the CPU clock to the X1 or XT1 clock, wait for the clock oscillation to stabilize, and then set
switching via software (see (3) in 6.6.1 Example of controlling high-speed system clock and (3) in 6.6.3
Example of controlling subsystem clock).
Notes 1.
With standard and (A) grade products, if the voltage rises with a slope of less than 0.5 V/ms (MIN.)
from power application until the voltage reaches 1.8 V, input a low level to the RESET pin from power
application until the voltage reaches 1.8 V, or set the 2.7 V/1.59 V POC mode by using the option byte
(POCMODE = 1) (see Figure 6-13). When a low level has been input to the RESET pin until the
voltage reaches 1.8 V, the CPU operates with the same timing as <2> and thereafter in Figure 6-12,
after the reset has been released by the RESET pin.
2.
With (A2) grade products, if the voltage rises with a slope of less than 0.75 V/ms (MIN.) from power
application until the voltage reaches 2.7 V, input a low level to the RESET pin from power application
until the voltage reaches 2.7 V. When a low level has been input to the RESET pin until the voltage
reaches 2.7 V, the CPU operates with the same timing as <2> and thereafter in Figure 6-12, after the
reset has been released by the RESET pin.
3.
The internal voltage stabilization time includes the oscillation accuracy stabilization time of the internal
high-speed oscillation clock.
<R>