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| 型号： | UPD78F0545GC(T2)-UBT-A |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP80 |
| 封装： | 14 X 14 MM, LEAD FREE, PLASTIC, LQFP-80 |
| 文件页数： | 65/96页 |
| 文件大小： | 4109K |
| 代理商： | UPD78F0545GC(T2)-UBT-A |
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Preliminary Product Information U14673EJ1V0PM00
68
PD789322,789324,789326,789327
8. RESET FUNCTION
8.1 Reset Function
The
PD789322, 789324, 789326, and 789327 can be reset using the following three signals.
(1) External reset signal input via RESET pin
(2) Internal reset by watchdog timer runaway time detection
(3) Internal reset using power-on-clear circuit (POC)
The external and internal reset signals are functionally equivalent. When RESET is input, program execution
begins from the addresses written at addresses 0000H and 0001H.
If a low-level signal is applied to the RESET pin, or if the watchdog timer overflows, a reset occurs, causing each
item of the hardware to enter the states listed in Table 8-1. While a reset is being applied, or while the oscillation
frequency is stabilizing immediately after the end of a reset sequence, each pin remains in the high-impedance state.
If a high-level signal is applied to the RESET pin, the reset sequence is terminated, and program execution begins
once the oscillation stabilization time has elapsed. A reset sequence caused by a watchdog timer overflow is
terminated automatically and again program execution begins upon the elapse of the oscillation stabilization time.
Reset by power-ON clear is cleared if the supply voltage rises beyond a specific level, and the program execution is
started after the oscillation stabilization time has elapsed.
Cautions 1. To use an external reset sequence, input a low-level signal to the RESET pin for at least 10
s.
2. When a reset is used to release STOP mode, the data of when STOP mode was entered is
retained during the reset sequence, except for the port pins, which are in the high-impedance
state.
3. The oscillation stabilization time after RESET input or the release of STOP mode by POC can
be selected from 2
15/fX or 217/fX by mask option (refer to 9. MASK OPTION).
Figure 8-1. Reset Function Block Diagram
RESET
Count clock
Reset control circuit
Watchdog timer
Stop
Over-
flow
Reset signal
Interrupt function
VDD
Power-on-clear circuit
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相关代理商/技术参数 |
参数描述 |
|---|---|
| UPD78F0545GC-UBT-A | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD78F0545GK(T)-8EU-A | 制造商:NEC Electronics Corporation 功能描述:8BIT MCU 60K FLASH 3KB RAM LQFP 制造商:Renesas 功能描述:MCU 8-Bit 78K0 CISC 60KB Flash 2.5V/3.3V/5V 80-Pin LQFP |
| UPD78F0546AGC-GAD-AX | 功能描述:MCU 8BIT 80-LQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:78K0/Kx2 标准包装:250 系列:80C 核心处理器:8051 芯体尺寸:8-位 速度:16MHz 连通性:EBI/EMI，I²C，UART/USART 外围设备:POR，PWM，WDT 输入/输出数:40 程序存储器容量:- 程序存储器类型:ROMless EEPROM 大小:- RAM 容量:256 x 8 电压 - 电源 (Vcc/Vdd):4.5 V ~ 5.5 V 数据转换器:A/D 8x10b 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:68-LCC（J 形引线） 包装:带卷 (TR) |
| UPD78F0546AGK-GAK-AX | 功能描述:MCU 8BIT 80-LQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:78K0/Kx2 标准包装:300 系列:78K0R/Ix3 核心处理器:78K/0R 芯体尺寸:16-位 速度:40MHz 连通性:3 线 SIO，I²C，LIN，UART/USART 外围设备:DMA，LVD，POR，PWM，WDT 输入/输出数:27 程序存储器容量:16KB（16K x 8） 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:1K x 8 电压 - 电源 (Vcc/Vdd):2.7 V ~ 5.5 V 数据转换器:A/D 8x10b 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:38-SSOP 包装:托盘 |
| UPD78F0546GK-8EU-A | 制造商:Renesas Electronics Corporation 功能描述: |
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