参数资料
型号: UPD78F9502MA-CAC-A
厂商: Renesas Electronics America
文件页数: 79/158页
文件大小: 0K
描述: MCU 8BIT SGL CHIP
标准包装: 400
系列: 78K0S/Kx1+
核心处理器: 78K0S
芯体尺寸: 8-位
速度: 10MHz
外围设备: LVD,POR,PWM,WDT
输入/输出数: 7
程序存储器容量: 4KB(4K x 8)
程序存储器类型: 闪存
RAM 容量: 128 x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 5.5 V
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 10-LSSOP(0.225",5.72mm 宽)
包装: 托盘
CHAPTER 2 PIN FUNCTIONS
User’s Manual U18172EJ3V0UD
25
2.2.2 P32 and P34 (Port 3)
P32 is a 1-bit I/O port. In addition to the function as an I/O port pin, this pin also has a function to input an external
interrupt request signal.
P34 is a 1-bit input-only port. This pin is also used as a RESET pin, and when the power is turned on, this is the
reset function.
For the setting method for pin functions, see CHAPTER 15 OPTION BYTE.
When P34 in
μPD78F920x is used as an input port pin, connect the pull-up resistor.
P32 and P34 can be set to the following operation modes in 1-bit units.
(1)
Port mode
P32 functions as a 1-bit I/O port. This pin can be set to the input or output mode by using port mode register 3
(PM3). In addition, an on-chip pull-up resistor can be connected to the port by using pull-up resistor option
register 3 (PU3).
P34 functions as a 1-bit input-only port. In
μPD78F950x, an on-chip pull-up resistor can be connected to the
port by using pull-up resistor option register 3 (PU3).
(2)
Control mode
P32 functions as an external interrupt request input pin (INTP1) for which the valid edge (rising edge, falling
edge, or both rising and falling edges) can be specified.
Caution
In
μPD78F950x, the P34/RESET pin is pulled up during reset by the reset pin function/power-on
clear circuit.
2.2.3 P40 and P43 (Port 4)
P40 and P43 constitute a 2-bit I/O port. Each bit of this port can be set to the input or output mode by using port
mode register 4 (PM4)
Note. In addition, an on-chip pull-up resistor can be connected to the port by using pull-up
resistor option register 4 (PU4).
Note
In
μPD78F920x, set PM41, PM42, and PM44 to PM47 to "0" at program initialization.
2.2.4 RESET
This pin inputs an active-low system reset signal.
When the power is turned on, this is the reset function,
regardless of the option byte setting.
Caution
In
μPD78F950x, the P34/RESET pin is pulled up during reset by the reset pin function/power-on
clear circuit.
2.2.5 X1 and X2 (
μPD78F920x)
These pins connect an oscillator to oscillate the X1 input clock.
X1 and X2 also function as P23/ANI3 and P22/ANI2, respectively. For the setting method for pin functions, see
CHAPTER 15 OPTION BYTE.
Supply an external clock to X1.
Caution
The P22/X2/ANI2 and P23/X1/ANI3 pins are pulled down during reset.
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