参数资料
型号: UPSD3212CV-24U6
厂商: 意法半导体
英文描述: Flash Programmable System Devices with 8032 MCU with USB and Programmable Logic
中文描述: 闪存可编程系统设备与8032具有USB和可编程逻辑控制器
文件页数: 106/163页
文件大小: 2844K
代理商: UPSD3212CV-24U6
uPSD3212A, uPSD3212C, uPSD3212CV
106/163
PLDS
The PLDs bring programmable logic functionality
to the uPSD. After specifying the logic for the
PLDs in PSDsoft Express, the logic is pro-
grammed into the device and available upon Pow-
er-up.
Table 87. DPLD and CPLD Inputs
Note: 1. These inputs are not available in the 52-pin package.
The PSD MODULE contains two PLDs: the De-
code PLD (DPLD), and the Complex PLD (CPLD).
The PLDs are briefly discussed in the next few
paragraphs, and in more detail in
Decode PLD
(DPLD), page 108
,
and
(CPLD), page 109
.
Figure 54., page 107
shows
the configuration of the PLDs.
The DPLD performs address decoding for Select
signals for PSD MODULE components, such as
memory, registers, and I/O ports.
The CPLD can be used for logic functions, such as
loadable counters and shift registers, state ma-
chines, and encoding and decoding logic. These
logic functions can be constructed using the Out-
put Macrocells (OMC), Input Macrocells (IMC),
and the AND Array. The CPLD can also be used
to generate External Chip Select (ECS1-ECS2)
signals.
The AND Array is used to form product terms.
These product terms are specified using PSDsoft.
The PLD input signals consist of internal MCU sig-
nals and external inputs from the I/O ports. The in-
put signals are shown in Table
87
.
The Turbo Bit in PSD MODULE
The PLDs can minimize power consumption by
switching off when inputs remain unchanged for
an extended time of about 70ns. Resetting the
Turbo Bit to '0' (Bit 3 of PMMR0) automatically
places the PLDs into standby if no inputs are
changing. Turning the Turbo Mode off increases
propagation delays while reducing power con-
sumption.
See
POWER MANAGEMENT, page 122
, on how
to set the Turbo Bit.
Additionally, five bits are available in PMMR2 to
block MCU control signals from entering the PLDs.
This reduces power consumption and can be used
only when these MCU control signals are not used
in PLD logic equations.
Each of the two PLDs has unique characteristics
suited for its applications. They are described in
the following sections.
Complex
PLD
Input Source
Input Name
Number
of
Signals
MCU Address Bus
A15-A0
16
MCU Control Signals
PSEN, RD, WR,
ALE
4
RESET
RST
1
Power-down
PDN
1
Port A Input
Macrocells
1
PA7-PA0
8
Port B Input
Macrocells
PB7-PB0
8
Port C Input
Macrocells
PC7, PC4-PC2
4
Port D Inputs
PD2-PD1
2
Page Register
PGR7-PGR0
8
Macrocell AB
Feedback
MCELLAB.FB7-
FB0
8
Macrocell BC
Feedback
MCELLBC.FB7-
FB0
8
Flash memory
Program Status Bit
Ready/Busy
1
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相关代理商/技术参数
参数描述
UPSD3212CV-24U6T 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 MCU with USB and Programmable Logic
UPSD3212CV-40T1T 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM
UPSD3212CV-40T6T 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 MCU with USB and Programmable Logic
UPSD3212CV-40U1T 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM
UPSD3212CV-40U6T 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 MCU with USB and Programmable Logic