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参数资料
型号： UPSD3212CV-24U6
厂商： 意法半导体
英文描述： Flash Programmable System Devices with 8032 MCU with USB and Programmable Logic
中文描述： 闪存可编程系统设备与8032具有USB和可编程逻辑控制器
文件页数： 45/163页
文件大小： 2844K
代理商： UPSD3212CV-24U6
45/163
uPSD3212A, uPSD3212C, uPSD3212CV
SUPERVISORY
There are four ways to invoke a reset and initialize
the uPSD321x Devices.
Via the external RESET pin
Via the internal LVR Block.
Via Watch Dog timer
Via USB bus reset signalling
The RESET mechanism is illustrated in Figure
20
.
Each RESET source will cause an internal reset
signal active. The CPU responds by executing an
internal reset and puts the internal registers in a
defined state. This internal reset is also routed as
an active low reset input to the PSD Module.
External Reset
The RESET pin is connected to a Schmitt trigger
for noise reduction. A RESET is accomplished by
holding the RESET pin LOW for at least 1ms at
power up while the oscillator is running. Refer to
AC spec on other RESET timing requirements.
Low V
DD
Voltage Reset
An internal reset is generated by the LVR circuit
when the V
DD
drops below the reset threshold. Af-
ter V
DD
reaching back up to the reset threshold,
the RESET signal will remain asserted for 10ms
■
■
■
■
before it is released. On initial power-up the LVR
is enabled (default). After power-up the LVR can
be disabled via the LVREN Bit in the PCON Reg-
ister.
Note:
The LVR logic is still functional in both the
Idle and Power-down Modes.
The reset threshold:
5V operation: 4V +/- 0.25V
3.3V operation: 2.5V +/-0.2V
This logic supports approximately 0.1V of hystere-
sis and 1μs noise-cancelling delay.
Watchdog Timer Overflow
The Watchdog Timer generates an internal reset
when its 22-bit counter overflows. See Watchdog
Timer section for details.
USB Reset
The USB reset is generated by a detection on the
USB bus RESET signal. A single-end zero on its
upstream port for 4 to 8 times will set RSTF Bit in
UISTA register. If Bit 6 (RSTE) of the UIEN Regis-
ter is set, the detection will also generate the
RESET signal to reset the CPU and other periph-
erals in the MCU.
■
■
Figure 20. RESET Configuration
AI07429b
Reset
CPU
&
PERI.
Noise
Cancel
LVR
S
Q
R
CPU
Clock
Sync
10ms
Timer
WDT
PSD_RST
"Active-Low"
10ms at 40Mhz
50ms at 8Mhz
USB Reset
RSTE
相关PDF资料
PDF描述
uPSD3212C Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM(带8032微控制器内核和16Kbit SRAM的FLASH可编程系统器件)
uPSD3212CV Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM(带8032微控制器内核和16Kbit SRAM的FLASH可编程系统器件)
uPSD3212 Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可编程系统器件)
UPSD3215A-24T1 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash
UPSD3215AV-40T6T 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash
相关代理商/技术参数
参数描述
UPSD3212CV-24U6T 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 MCU with USB and Programmable Logic
UPSD3212CV-40T1T 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM
UPSD3212CV-40T6T 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 MCU with USB and Programmable Logic
UPSD3212CV-40U1T 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM
UPSD3212CV-40U6T 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 MCU with USB and Programmable Logic
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