- 您现在的位置：买卖IC网 > PDF目录361590 > UPSD3233A-40T6T (意法半导体) CABLE ASSEMBLY; LEAD-FREE SOLDER; C MALE TO C MALE; 75 OHM, RG59B/U COAX PDF资料下载
参数资料
| 型号： | UPSD3233A-40T6T |
| 厂商： | 意法半导体 |
| 英文描述： | CABLE ASSEMBLY; LEAD-FREE SOLDER; C MALE TO C MALE; 75 OHM, RG59B/U COAX |
| 中文描述： | 闪存可编程系统设备与8032微控制器核心和64Kbit SRAM的 |
| 文件页数： | 21/176页 |
| 文件大小： | 1081K |
| 代理商： | UPSD3233A-40T6T |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页当前第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页第141页第142页第143页第144页第145页第146页第147页第148页第149页第150页第151页第152页第153页第154页第155页第156页第157页第158页第159页第160页第161页第162页第163页第164页第165页第166页第167页第168页第169页第170页第171页第172页第173页第174页第175页第176页
21/176
μ
PSD323X
(3) Register addressing.
The
containing registers R0 through R7, can be ac-
cessed by certain instructions which carry a 3-bit
register specification within the opcode of the in-
struction. Instructions that access the registers
this way are code efficient, since this mode elimi-
nates anaddress byte. When the instruction is ex-
ecuted, one of four banks is selected at execution
time by the two bank select bits in the PSW.
Example:
mov PSW, #0001000B ; select Bank0
mov A, #30H
mov R1, A
(4) Register-specific addressing.
Some
structions are specific to a certain register. For ex-
ample, some instructions always operate on the
Accumulator, or Data Pointer, etc., so no address
byte is needed to point it. The opcode itself does
that.
(5) Immediate constants addressing.
The val-
ue of a constantcan follow theopcode in Program
memory.
Example:
mov A, #10H.
(6) Indexed addressing.
Only Program memory
can be accessed with indexed addressing, and it
can only be read. Thisaddressing modeis intend-
ed for reading look-up tables in Program memory.
A 16-bit base register (either DPTR or PC) points
to the base of the table,and theAccumulator is set
up with the table entry number. The address of the
table entry in Program memory is formed by add-
ing the Accumulator data to the base pointer.
Example:
movc A, @A+DPTR
register
banks,
in-
Figure 13. Indexed Addressing
Arithmetic Instructions
The arithmetic instructions is listed in Table 4,
page 22. The table indicates the addressing
modes that can be used with each instruction to
access the <byte> operand. For example, the
ADD A, <byte> instruction can be written as:
ADD a, 7FH(direct addressing)
ADD A, @R0 (indirect addressing)
ADD a, R7 (register addressing)
ADD A, #127 (immediate constant)
Note:
Any byte in the internal DataMemory space
can be incremented without going through theAc-
cumulator.
One of theINC instructions operates on the 16-bit
Data Pointer.The Data Pointer is used to generate
16-bit addresses for external memory, so being
able to increment it in one 16-bit operations is
a useful feature.
The MUL AB instruction multiplies the Accumula-
tor by the data in the B registerand puts the16-bit
product into the concatenated B and Accumulator
registers.
The DIV AB instruction divides the Accumulator by
the data in the B register and leaves the 8-bit quo-
tient inthe Accumulator, and the 8-bit remainder in
the B register.
In shift operations, dividing a number by 2n shifts
its “n” bits to theright. Using DIV AB to performthe
division completes the shift in 4s and leaves the
B register holding the bits that were shifted out.
The DAA instruction is for BCD arithmetic opera-
tions. In BCD arithmetic, ADD and ADDC instruc-
tions should always be followed by a DAA
operation, to ensure that the result is also in BCD.
Note:
DAA will not convert a binary number to
BCD. The DAA operation produces a meaningful
result only as the second step in the addition of
two BCD bytes.
AI06643
3Eh
Program Memory
ACC
3Ah
DPTR
1E73h
相关PDF资料 |
PDF描述 |
|---|---|
| UPSD3233A-40U6T | Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM |
| UPSD3233AV-24T1T | Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM |
| UPSD3233AV-24T6T | Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM |
| UPSD3233BV-40T1T | Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM |
| UPSD3233BV-40U6T | Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| UPSD3233A-40U1 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core |
| UPSD3233A-40U1T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core |
| UPSD3233A-40U6 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core |
| UPSD3233A-40U6T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core |
| UPSD3233AV-24T1 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core |
发布紧急采购，3分钟左右您将得到回复。