参数资料
型号: UPSD3233A-40T6T
厂商: 意法半导体
英文描述: CABLE ASSEMBLY; LEAD-FREE SOLDER; C MALE TO C MALE; 75 OHM, RG59B/U COAX
中文描述: 闪存可编程系统设备与8032微控制器核心和64Kbit SRAM的
文件页数: 26/176页
文件大小: 1081K
代理商: UPSD3233A-40T6T
μ
PSD323X
26/176
External RAM.
Table 10 shows a list of the Data
Transfer instructions that access external Data
Memory. Only indirect addressing can be used.
The choice is whether to use a one-byte address,
@Ri, where Ri can be either R0 or R1 of the se-
lected
register
bank,
address, @DTPR.
Note:
In all external Data RAM accesses, the Ac-
cumulator is always either the destination or
source of the data.
Lookup Tables.
Table 11 shows the two instruc-
tions that are available for reading lookup tables in
Program Memory. Sincethese instructionsaccess
only Program Memory, the lookup tables can only
be read, not updated.
The mnemonic is MOVC for “move constant.” The
first MOVC instruction in Table 11 can accommo-
date a table of up to 256 entries numbered 0
through 255. The number of the desired entry is
loaded into the Accumulator, and the Data Pointer
is set up to point to the beginning of the table.
Then:
MOVC A, @A+DPTR
or
a
two-byte
copies the desired table entry into the Accumula-
tor.
The other MOVC instruction works the same way,
except the Program Counter (PC) is used as the
table base, and the table is accessed through a
subroutine. First the number of the desired en-try
is loaded into the Accumulator, and the subroutine
is called:
MOV A , ENTRY NUMBER
CALL TABLE
The subroutine “TABLE” would look like this:
TABLE: MOVC A , @A+PC
RET
The table itself immediately follows the RET (re-
turn) instruction is Program Memory. This type of
table can have up to 255 entries, numbered 1
through 255. Number 0 cannot be used, because
at the time the MOVC instruction is executed, the
PC contains the address of the RET instruction.
An entry numbered 0 would be the RET opcode it-
self.
Table 10. Data Transfer Instruction that Access External Data Memory Space
Table 11. Lookup Table READ Instruction
Address Width
Mnemonic
Operation
8 bits
MOVX A,@Ri
READ external RAM @Ri
8 bits
MOVX @Ri,A
WRITE external RAM @Ri
16 bits
MOVX A,@DPTR
READ external RAM @DPTR
16 bits
MOVX @DPTR,a
WRITE external RAM @DPTR
Mnemonic
Operation
MOVC A,@A+DPTR
READ program memory at (A+DPTR)
MOVC A,@A+PC
READ program memory at (A+PC)
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