参数资料
型号: UPSD3233A-40U6T
厂商: 意法半导体
英文描述: Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM
中文描述: 闪存可编程系统设备与8032微控制器核心和64Kbit SRAM的
文件页数: 113/176页
文件大小: 1081K
代理商: UPSD3233A-40U6T
113/176
μ
PSD323X
Data Toggle.
Checking
(DQ6) is a method of determining whether a Pro-
gram orErase cycle is in progress or has complet-
ed. Figure 53 shows the Data Toggle algorithm.
When the MCU issues a Program instruction, the
embedded algorithm begins.The MCU then reads
the locationof thebyte to be programmed in Flash
memory to check status. The Toggle Flag Bit
(DQ6) of this location toggles each time the MCU
reads this locationuntil the embedded algorithm is
complete. The MCU continues to read this loca-
tion, checking the Toggle Flag Bit (DQ6) and mon-
itoring the Error Flag Bit (DQ5). When the Toggle
Flag Bit (DQ6) stops toggling (two consecutive
reads yield the same value), and the Error Flag Bit
(DQ5) remains ’0,’ the embedded algorithm is
complete. If the Error Flag Bit (DQ5) is ’1,’ the
MCU should test theToggle Flag Bit (DQ6)again,
since the Toggle Flag Bit (DQ6) may have
changed simultaneously with the Error Flag Bit
(DQ5) (see Figure 53).
The Error Flag Bit(DQ5) is set if either an internal
time-out occurred while the embedded algorithm
attempted to program the byte, or if the MCU at-
tempted to program a ’1’ to a bit that was not
erased (not erased is logic ’0’).
It issuggested (as withall Flash memories)to read
the location again after the embedded program-
ming algorithm has completed, to compare the
byte that was written to Flash memory with the
byte that was intended to be written.
When using the Data Toggle method after an
Erase cycle, Figure 53 still applies. the Toggle
Flag Bit (DQ6) toggles until the Erase cycle is
complete. A1 onthe ErrorFlag Bit (DQ5)indicates
a time-out condition on the Erase cycle; a ’0’indi-
the
Toggle
Flag Bit
cates no error. The MCU can read any location
within the sector being erased to get the Toggle
Flag Bit (DQ6) and the Error Flag Bit (DQ5).
PSDsoft Express generates ANSI C code func-
tions which implement these Data Toggling algo-
rithms.
Figure 53. Data Toggle Flowchart
READ
DQ5 & DQ6
START
READ DQ6
FAIL
PASS
AI01370B
DQ6
TOGGLE
NO
NO
YES
YES
DQ5
= 1
NO
YES
DQ6
TOGGLE
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UPSD3233AV-24T1T Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM
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UPSD3234AV-40U6T Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM
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