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参数资料
| 型号： | W25Q16BVDAIG |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | PROM |
| 英文描述： | 2M X 8 SPI BUS SERIAL EEPROM, PDIP8 |
| 封装： | 0.300 INCH, GREEN, PLASTIC, DIP-8 |
| 文件页数： | 24/68页 |
| 文件大小： | 2055K |
| 代理商： | W25Q16BVDAIG |
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W25Q16BV
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11.2.14 Fast Read Quad I/O (EBh)
The Fast Read Quad I/O (EBh) instruction is similar to the Fast Read Dual I/O (BBh) instruction except
that address and data bits are input and output through four pins IO0, IO1, IO2 and IO3 and four Dummy
clocks are required prior to the data output. The Quad I/O dramatically reduces instruction overhead
allowing faster random access for code execution (XIP) directly from the Quad SPI. The Quad Enable bit
(QE) of Status Register-2 must be set to enable the Fast read Quad I/O Instruction.
Fast Read Quad I/O with “Continuous Read Mode”
The Fast Read Quad I/O instruction can further reduce instruction overhead through setting the
“Continuous Read Mode” bits (M7-0) after the input Address bits (A23-0), as shown in figure 13a. The
upper nibble of the (M7-4) controls the length of the next Fast Read Quad I/O instruction through the
inclusion or exclusion of the first byte instruction code. The lower nibble bits of the (M3-0) are don’t care
(“x”). However, the IO pins should be high-impedance prior to the falling edge of the first data out clock.
If the “Continuous Read Mode” bits (M7-0) equals “Ax” hex, then the next Fast Read Quad I/O instruction
(after /CS is raised and then lowered) does not require the EBh instruction code, as shown in figure 13b.
This reduces the instruction sequence by eight clocks and allows the Read address to be immediately
entered after /CS is asserted low. If the “Continuous Read Mode” bits (M7-0) are any value other than
“Ax” hex, the next instruction (after /CS is raised and then lowered) requires the first byte instruction code,
thus returning to normal operation. A “Continuous Read Mode” Reset instruction can be used to reset
(M7-0) before issuing normal instructions (See 11.2.32 for detailed descriptions).
Byte 1
Byte 2
Byte 1
Byte 2
Figure 13a. Fast Read Quad I/O Instruction Sequence Diagram (M7-0 = 0xh or NOT Axh)
相关PDF资料 |
PDF描述 |
|---|---|
| W25Q16BVDAIP | 2M X 8 SPI BUS SERIAL EEPROM, PDIP8 |
| W25Q16BVSNIP | 2M X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| W25Q40BLSNIP | 4M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| W25Q80BVSFIG | 1M X 8 SPI BUS SERIAL EEPROM, PDSO16 |
| W25X32AVZPIG | 4M X 8 FLASH 2.7V PROM, PDSO8 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| W25Q16BVDAIP | 制造商:WINBOND 制造商全称:Winbond 功能描述:16M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q16BVSFIG | 功能描述:IC SPI FLASH 16MBIT 16SOIC RoHS:是 类别:集成电路 (IC) >> 存储器 系列:SpiFlash® 标准包装:2,000 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 异步 存储容量:256K (32K x 8) 速度:15ns 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:28-TSSOP（0.465"，11.8mm 宽） 供应商设备封装:28-TSOP 包装:带卷 (TR) 其它名称:71V256SA15PZGI8 |
| W25Q16BVSFIP | 制造商:WINBOND 制造商全称:Winbond 功能描述:16M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q16BVSNIG | 制造商:Winbond Electronics Corp 功能描述:Flash Serial-SPI 3.3V 16Mbit 2M x 8bit 6ns 8-Pin SOIC |
| W25Q16BVSNIP | 制造商:WINBOND 制造商全称:Winbond 功能描述:16M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
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