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参数资料
| 型号： | W28J161TB90L |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | PROM |
| 英文描述： | 1M X 16 FLASH 3V PROM, 90 ns, PBGA48 |
| 封装： | 8 X 8 MM, 0.75 MM PITCH, TFBGA-48 |
| 文件页数： | 14/43页 |
| 文件大小： | 1333K |
| 代理商： | W28J161TB90L |
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W28J161B/T
Publication Release Date: April 7, 2003
- 21 -
Revision A4
Bus Operation
Command
Comments
Write
Read Status
Register
Data = 70H
Addr = X
Read
Status Register Data
Standby
Check SR.7
1 = WSM Ready
0 = WSM Busy
Write
Full Chip Erase
Setup
Data = 30H
Addr = X
Write
Full Chip Erase
Confirm
Data = D0H
Addr = X
Read
Status Register Data
Standby
Check SR.7
1 = WSM Ready
0 = WSM Busy
Full status check can be done after each full chip erase.
Write FFH after the last operation to place device in read
array mode.
Start
Write 70H
SR.7=
Write 30H
Read Status
Register
SR.7=
Full Status
Check if Desired
Full Chip Erase
Complete
Read Status
Register
Write D0H
1
0
1
0
Full STATUS CHECK PROCEDURE
Read Status Register
Data(See Above)
SR.3=
SR.1=
SR.4,5=
SR.5=
Full Chip Erase
0
1
Vpp Range Error
Device Protect Error
Command Sequence
Full Chip Erase Error
Error
Successfully
Bus Operation
Command
Comments
Standby
Check SR.3
1 = VPP Error Detect
Standby
Check SR.1
1 = Device Protect Detect
(All Blocks are locked)
Standby
Check SR.4,5
Both 1=Command
Sequence Error
Standby
Check SR.5
1 = Full Chip Erase Error
SR.5, SR.4, SR.3 and SR.1 are only cleared by the Clear
Status Register Command in cases where multiple blocks
are erased before full status is checked.
If error is detected, clear the Status Register before
attempting retry or other error recovery.
Figure 6. Automated Full Chip Erase Flowchart
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