参数资料
型号: W28J800BT90C
元件分类: EEPROM
英文描述: EEPROM
中文描述: EEPROM的
文件页数: 6/51页
文件大小: 1468K
代理商: W28J800BT90C
W28J800B/T
Block Organization
This product features an asymmetrically-blocked architecture providing system memory integration.
Each erase block can be erased independently of the others up to 100,000 times. For the address
locations of the blocks, see the memory map in Figure 3.
Boot Blocks
: The boot block is intended to replace a dedicated boot PROM in a microprocessor or
microcontroller-based system. This boot block 4k words (4,096 words) features hardware controllable
write protection to protect the crucial microprocessor boot code from accidental modification. The
protection of the boot block is controlled using a combination of the V
PP
, #RESET, #WP pins and
block lock-bit.
Parameter Blocks
: The boot block architecture includes parameter blocks to facilitate storage of
frequently update small parameters that would normally require an EEPROM. By using software
techniques, the word-rewrite functionality of EEPROMs can be emulated. Each boot block component
contains six parameter blocks of 4k words (4,096 words) each. The protection of the parameter block
is controlled using a combination of the V
PP
, #RESET and block lock-bit.
Main Blocks
: The reminder is divided into main blocks for data or code storage. Each 8M-bit device
contains fifteen 32k words (32,768 words) blocks. The protection of the main block is controlled using
a combination of the V
PP
, #RESET and block lock-bit.
5. PIN CONFIGURATION
48-pin TSOP
Standard Pinout
12mm X 20mm
Top View
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
#OE
Vss
A16
#BYTE
Vss
#CE
A0
48
47
76
45
44
43
42
41
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
V
DD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
A9
A8
A10
A11
A12
A13
A14
A15
24
23
A17
A7
A6
A5
A4
A3
A2
A1
#WE
21
22
#WP
A18
RY/#BY
#RESET
Vpp
NC
NC
Figure 2. TSOP 48-Lead Pinout
- 6 -
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