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| 型号： | W39L020P-90Z |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | PROM |
| 英文描述： | 256K X 8 FLASH 3.3V PROM, 90 ns, PQCC32 |
| 封装： | LEAD FREE, PLASTIC, LCC-32 |
| 文件页数： | 26/29页 |
| 文件大小： | 294K |
| 代理商： | W39L020P-90Z |
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W39L020
- 6 -
6. FUNCTIONAL DESCRIPTION
6.1 Device Bus Operation
6.1.1
Read Mode
The read operation of the W39L020 is controlled by #CE and #OE, both of which have to be low for the
host to obtain data from the outputs. #CE is used for device selection. When #CE is high, the chip is
de-selected and only standby power will be consumed. #OE is the output control and is used to gate
data from the output pins. The data bus is in high impedance state when either #CE or #OE is high.
Refer to the timing waveforms for further details.
6.1.2
Write Mode
Device erasure and programming are accomplished via the command register. The contents of the
register serve as inputs to the internal state machine. The state machine outputs dictate the function of
the device.
The command register itself does not occupy any addressable memory location. The register is a latch
used to store the commands, along with the address and data information needed to execute the
command. The command register is written to bring #WE to logic low state, while #CE is at logic low
state and #OE is at logic high state. Addresses are latched on the falling edge of #WE or #CE,
whichever happens later; while data is latched on the rising edge of #WE or #CE, whichever happens
first. Standard microprocessor write timings are used.
Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing
parameters.
6.1.3
Standby Mode
There are two ways to implement the standby mode on the W39L020 device, both using the #CE pin.
A CMOS standby mode is achieved with the
#CE input held at VDD
±0.5V. Under this condition the current is
typically reduced to less than 25
A(max). A TTL standby mode is achieved with the #CE pin held at
VIH. Under this condition the current is typically reduced to 2 mA(max).
In the standby mode the outputs are in the high impedance state, independent of the #OE input.
6.1.4
Output Disable Mode
With the #OE input at a logic high level (VIH), output from the device is disabled. This will cause the
output pins to be in a high impedance state.
6.1.5
Auto-select Mode
The auto-select mode allows the reading of a binary code from the device and will identify its
manufacturer and type. This mode is intended for use by programming equipment for the purpose of
automatically matching the device to be programmed with its corresponding programming algorithm.
This mode is functional over the entire temperature range of the device.
To activate this mode, the programming equipment must force VID (11.5V to 12.5V) on address pin A9.
Two identifier bytes may then be sequenced from the device outputs by toggling address A0 from VIL to
VIH. All addresses are don
′t cares except A0 and A1 (see "Auto-select Codes").
The manufacturer and device codes may also be read via the command register, for instance, when the
W39L020 is erased or programmed in a system without access to high voltage on the A9 pin. The
command sequence is illustrated in "Auto-select Codes".
Byte 0 (A0 = VIL) represents the manufacturer
′s code (Winbond = DAH) and byte 1 (A0 = VIH) the
device identifier code (W39L020 = B5hex). All identifiers for manufacturer and device will exhibit odd
parity with DQ7 defined as the parity bit. In order to read the proper device codes when executing the
Auto-select, A1 must be low state.
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相关代理商/技术参数 |
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| W39L020Q-70 | 制造商:WINBOND 制造商全称:Winbond 功能描述:128K X 8 CMOS FLASH MEMORY |
| W39L020Q-70B | 制造商:WINBOND 制造商全称:Winbond 功能描述:128K X 8 CMOS FLASH MEMORY |
| W39L020Q-90 | 制造商:WINBOND 制造商全称:Winbond 功能描述:128K X 8 CMOS FLASH MEMORY |
| W39L020Q-90B | 制造商:WINBOND 制造商全称:Winbond 功能描述:128K X 8 CMOS FLASH MEMORY |
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