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参数资料
| 型号： | W3HG128M72AEF665F1MCG |
| 厂商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分类： | DRAM |
| 英文描述： | DDR DRAM MODULE, DMA240 |
| 封装： | ROHS COMPLIANT, FBDIMM-240 |
| 文件页数： | 10/17页 |
| 文件大小： | 256K |
| 代理商： | W3HG128M72AEF665F1MCG |
2
W3HG128M72AEF-Fx
September 2007
Rev. 3
ADVANCED
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
PIN NAMES
Symbol
Descriptions
SCK
System Clock Input, positive line
SCK#
System Clock Input, negative line
PN0-PN13
Primary Northbound Data, positive lines
PN0#-PN13#
Primary Northbound Data, negative lines
PS0-PS9
Primary Southbound Data, positive lines
PS0#-PS9#
Primary Southbound Data, negative lines
SN0-SN13
Secondary Northbound Data, positive lines
SN0#-SN13#
Secondary Northbound Data, negative lines
SS0-SS9
Secondary Southbound Data, positive lines
SS0#-SS9#
Secondary Southbound Data, negative lines
SCL
Serial Presence Detect (SPD) Clock Input
SDA
SPD Data Input/Output
SA0-SA2
SPD Address Inputs, also used to select the
FBDIMM number in the AMB
VID0-VID1
Voltage ID: These pins must be
unconnected for DDR2-based FBDIMMs.
VID0 is VDD value: OPEN=1.8V,
GND=1.5V;VID1 is VCC value: OPEN=1.5V,
GND=1.2V
RESET#
AMB reset signal
RFU
Reserved for Future Use
VCC
AMB Core Power and AMB Channel
Interface Power (1.5V)
VDD
DRAM Power and AMB DRAM I/O Power
(1.8V)
VTT
DRAM Address/Command/Clock
Termination Power (VDD/2)
VCCSPD
SPD Power
VSS
Ground
DNU/M_TEST
Do Not Use
Note:
1. These pin positions are reserved for forwarded clocks to be used in
future module implemenations
2. These pin positions are reserved for future architechture exibility.
3. The following signals are CRC bits and thus appear out of the
normal sequence: PN12/PN12#, SN12/SN12#, PN13/PN13#,
PS9/PS9#, SS9/SS9#.
4. RFU = Reserved Future Use.
PIN ASSIGNMENT – 240 PIN FBDIMM
PIN
SYMBOL
PIN
SYMBOL
PIN
SYMBOL
PIN
SYMBOL
1VDD
61
PN9#
121
VDD
181
SN9#
2VDD
62
VSS
122
VDD
182
VSS
3VDD
63
PN10
123
VDD
183
SN10
4VSS
64
PN10#
124
VSS
184
SN10#
5VDD
65
VSS
125
VDD
185
VSS
6VDD
66
PN11
126
VDD
186
SN11
7VDD
67
PN11#
127
VDD
187
SN11#
8VSS
68
VSS
128
VSS
188
VSS
9VCC
69
VSS
129
VCC
189
VSS
10
VCC
70
PS0
130
VCC
190
SS0
11
VSS
71
PS0#
131
VSS
191
SS0#
12
VCC
72
VSS
132
VCC
192
VSS
13
VCC
73
PS1
133
VCC
193
SS1
14
VSS
74
PS1#
134
VSS
194
SS1#
15
VTT
75
VSS
135
VTT
195
VSS
16
VID1
76
PS2
136
VID0
196
SS2
17
RESET#
77
PS2#
137
DNU/M_Test
197
SS2#
18
VSS
78
VSS
138
VSS
198
VSS
19
RFU2
79
PS3
139
RFU2
199
SS3
20
RFU2
80
PS3#
140
RFU2
200
SS3#
21
VSS
81
VSS
141
VSS
201
VSS
22
PN0
82
PS4
142
SN0
202
SS4
23
PN0#
83
PS4#
143
SN0#
203
SS4#
24
VSS
84
VSS
144
VSS
204
VSS
25
PN1
85
VSS
145
SN1
205
VSS
26
PN1#
86
RFU1
146
SN1#
206
RFU1
27
VSS
87
RFU1
147
VSS
207
RFU1
28
PN2
88
VSS
148
SN2
208
VSS
29
PN2#
89
VSS
149
SN2#
209
VSS
30
VSS
90
PS9
150
VSS
210
SS9
31
PN3
91
PS9#
151
SN3
211
SS9#
32
PN3#
92
VSS
152
SN3#
212
VSS
33
VSS
93
PS5
153
VSS
213
SS5
34
PN4
94
PS5#
154
SN4
214
SS5#
35
PN4#
95
VSS
155
SN4#
215
VSS
36
VSS
96
PS6
156
VSS
216
SS6
37
PN5
97
PS6#
157
SN5
217
SS6#
38
PN5#
98
VSS
158
SN5#
218
VSS
39
VSS
99
PS7
159
VSS
219
SS7
40
PN13
100
PS7#
160
SN13
220
SS7#
41
PN13#
101
VSS
161
SN13#
221
VSS
42
VSS
102
PS8
162
VSS
222
SS8
43
VSS
103
PS8#
163
VSS
223
SS8#
44
RFU
104
VSS
164
RFU1
224
VSS
45
RFU
105
RFU2
165
RFU1
225
RFU2
46
VSS
106
RFU2
166
VSS
226
RFU2
47
VSS
107
VSS
167
VSS
227
VSS
48
PN12
108
VDD
168
SN12
228
SCK
49
PN12#
109
VDD
169
SN12#
229
SCK#
50
VSS
110
VSS
170
VSS
230
VSS
51
PN6
111
VDD
171
SN6
231
VDD
52
PN6#
112
VDD
172
SN6#
232
VDD
53
VSS
113
VDD
173
VSS
233
VDD
54
PN7
114
VSS
174
SN7
234
VSS
55
PN7#
115
VDD
175
SN7#
235
VDD
56
VSS
116
VDD
176
VSS
236
VDD
57
PN8
117
VTT
177
SN8
237
VTT
58
PN8#
118
SA2
178
SN8#
238
VCCSPD
59
VSS
119
SDA
179
VSS
239
SA0
60
PN9
120
SCL
180
SN9
240
SA1
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