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参数资料
| 型号： | W9412G6IH-6I |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | DRAM |
| 英文描述： | 8M X 16 DDR DRAM, 0.7 ns, PDSO66 |
| 封装： | 0.400 INCH, ROHS COMPLIANT, TSOP2-66 |
| 文件页数： | 13/53页 |
| 文件大小： | 825K |
| 代理商： | W9412G6IH-6I |
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W9412G6IH
Publication Release Date: Sep. 16, 2009
- 20 -
Revision A06
Function Truth Table, continued
CURRENT
STATE
CS
RAS CAS
WE
ADDRESS
COMMAND
ACTION
NOTES
H
X
DSL
NOP->Row active after tWR
L
H
X
NOP
NOP->Row active after tWR
L
H
L
X
BST
ILLEGAL
L
H
L
H
BA, CA, A10
READ/READA
ILLEGAL
3
L
H
L
BA, CA, A10
WRIT/WRITA
ILLEGAL
3
L
H
BA, RA
ACT
ILLEGAL
3
L
H
L
BA, A10
PRE/PREA
ILLEGAL
3
L
H
X
AREF/SELF
ILLEGAL
Write
Recovering
L
Op-Code
MRS/EMRS
ILLEGAL
H
X
DSL
NOP->Enter precharge after
tWR
L
H
X
NOP
NOP->Enter precharge after
tWR
L
H
L
X
BST
ILLEGAL
L
H
L
H
BA, CA, A10
READ/READA
ILLEGAL
3
L
H
L
BA, CA, A10
WRIT/WRITA
ILLEGAL
3
L
H
BA, RA
ACT
ILLEGAL
3
L
H
L
BA, A10
PRE/PREA
ILLEGAL
3
L
H
X
AREF/SELF
ILLEGAL
Write
Recovering
with Auto-
precharge
L
Op-Code
MRS/EMRS
ILLEGAL
H
X
DSL
NOP->Idle after tRC
L
H
X
NOP
NOP->Idle after tRC
L
H
L
X
BST
ILLEGAL
L
H
L
H
X
READ/WRIT
ILLEGAL
L
H
X
ACT/PRE/PREA
ILLEGAL
Refreshing
L
X
AREF/SELF/MRS/EMRS
ILLEGAL
H
X
DSL
NOP->Row after tMRD
L
H
X
NOP
NOP->Row after tMRD
L
H
L
X
BST
ILLEGAL
L
H
L
X
READ/WRIT
ILLEGAL
Mode
Register
Accessing
L
X
ACT/PRE/PREA/ARE
F/SELF/MRS/EMRS
ILLEGAL
Notes
:
1. All entries assume that CKE was active (High level) during the preceding clock cycle and the current clock cycle.
2. Illegal if any bank is not idle.
3. Illegal to bank in specified states; Function may be legal in the bank indicated by Bank Address (BA), depending on the
state of that bank.
4. Illegal if tRCD is not satisfied.
5. Illegal if tRAS is not satisfied.
6. Must satisfy burst interrupt condition.
7. Must avoid bus contention, bus turn around, and/or satisfy write recovery requirements.
8. Must mask preceding data which don’t satisfy tWR
Remark: H = High level, L = Low level, X = High or Low level (Don’t Care), V = Valid data
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| WS512K32L-20H1Q | 512K X 32 MULTI DEVICE SRAM MODULE, 20 ns, CPGA66 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W9412G6JH | 制造商:WINBOND 制造商全称:Winbond 功能描述:2M ? 4 BANKS ? 16 BITS DDR SDRAM |
| W9412G6JH-4 | 制造商:Winbond Electronics Corp 功能描述:8*16B DDR1 制造商:Winbond Electronics Corp 功能描述:IC DDR SDRAM 128M 250MHZ 66TSOP |
| W9412G6JH-5 | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR SDRAM 128M-Bit 8Mx16 2.5V 66-Pin TSOP 制造商:Winbond Electronics Corp 功能描述:128M BIT DDR1 |
| W9412G6JH-5I | 功能描述:IC DDR SDRAM 128MBIT 66TSOPII RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:72 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 同步 存储容量:4.5M（256K x 18） 速度:133MHz 接口:并联 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 70°C 封装/外壳:100-LQFP 供应商设备封装:100-TQFP（14x20） 包装:托盘 |
| W9412G6JH-5TR | 制造商:Winbond Electronics Corp 功能描述:128M DDR SDRAM X16 200MHZ, 65N |
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