- 您现在的位置：买卖IC网 > PDF目录68559 > W9425G6DH-6F (WINBOND ELECTRONICS CORP) 16M X 16 DDR DRAM, 0.7 ns, PDSO66 PDF资料下载
参数资料
| 型号： | W9425G6DH-6F |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | DRAM |
| 英文描述： | 16M X 16 DDR DRAM, 0.7 ns, PDSO66 |
| 封装： | 0.400 INCH, 0.65 MM PITCH, ROHS COMPLIANT, TSOP2-66 |
| 文件页数： | 28/53页 |
| 文件大小： | 1817K |
| 代理商： | W9425G6DH-6F |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页当前第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页
W9425G6DH
Publication Release Date:Feb. 12, 2008
- 34 -
Revision A8
f. Verified under typical conditions for qualification purposes.
g. TSOP II package devices only.
h. Only intended for operation up to 266 Mbps per pin.
i. A derating factor will be used to increase tIS and tIH in the case where the input slew rate is below
0.5 V/nS as shown in Table 2. The Input slew rate is based on the lesser of the slew rates
determined by either VIH(AC) to VIL(AC) or VIH(DC) to VIL(DC), similarly for rising transitions.
j. A derating factor will be used to increase tDS and tDH in the case where DQ, DM, and DQS slew
rates differ, as shown in Tables 3 & 4. Input slew rate is based on the larger of AC-AC delta rise,
fall rate and DC-DC delta rise, fall rate. Input slew rate is based on the lesser of the slew rates
determined by either VIH(AC) to VIL(AC) or VIH(DC) to VIL(DC), similarly for rising transitions.
The delta rise/fall rate is calculated as:
{1/(Slew Rate1)}-{1/(slew Rate2)}
For example: If Slew Rate 1 is 0.5 V/nS and Slew Rate 2 is 0.4 V/nS, then the delta rise, fall rate is
-0.5 nS/V. Using the table given, this would result in the need for an increase in tDS and tDH of 100
pS.
k. Table 3 is used to increase tDS and tDH in the case where the I/O slew rate is below 0.5 V/nS. The
I/O slew rate is based on the lesser of the AC-AC slew rate and the DC-DC slew rate. The input
slew rate is based on the lesser of the slew rates determined by either VIH(AC) to VIL(AC) or VIH(DC)
to VIL(DC), and similarly for rising transitions.
m. DQS, DM, and DQ input slew rate is specified to prevent double clocking of data and preserve
setup and hold times. Signal transitions through the DC region must be monotonic.
相关PDF资料 |
PDF描述 |
|---|---|
| W9425G6DH-6I | 16M X 16 DDR DRAM, 0.7 ns, PDSO66 |
| W9425G8EH-5 | 32M X 8 DDR DRAM, 0.7 ns, PDSO66 |
| W9451GBDA-6 | 64M X 64 DDR DRAM MODULE, 0.7 ns, DMA184 |
| W9451GBDA-75 | 64M X 64 DDR DRAM MODULE, 0.75 ns, DMA184 |
| W946432AD-5 | 2M X 32 DDR DRAM, 0.1 ns, PQFP100 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| W9425G6EH | 制造商:WINBOND 制造商全称:Winbond 功能描述:4 M 】 4 BANKS 】 16 BITS DDR SDRAM |
| W9425G6EH_0812 | 制造商:WINBOND 制造商全称:Winbond 功能描述:4 M × 4 BANKS × 16 BITS DDR SDRAM |
| W9425G6EH-5 | 功能描述:IC DDR-400 SDRAM 256MB 66TSSOPII RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:1,000 系列:- 格式 - 存储器:EEPROMs - 串行 存储器类型:EEPROM 存储容量:4K (512 x 8) 速度:400kHz 接口:I²C，2 线串口 电源电压:2.7 V ~ 5.5 V 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.173"，4.40mm 宽） 供应商设备封装:8-MFP 包装:带卷 (TR) |
| W9425G6EH-5I | 制造商:Winbond Electronics Corp 功能描述: |
| W9425G6JB-5 | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR SDRAM 256M-Bit 16Mx16 2.5V 60-Pin TFBGA 制造商:Winbond Electronics 功能描述:IC MEMORY 制造商:Winbond Electronics Corp 功能描述:IC MEMORY 制造商:Winbond 功能描述:16MX16,256Mb DDRI DRAM ,200MHZ, BGA |
发布紧急采购，3分钟左右您将得到回复。