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| 型号： | WBLXT974BHCA8 |
| 厂商： | CORTINA SYSTEMS INC |
| 元件分类： | 网络接口 |
| 英文描述： | DATACOM, ETHERNET TRANSCEIVER, PQFP160 |
| 封装： | ROHS COMPLIANT, PLASTIC, MS-002DD-1, HQFP-160 |
| 文件页数： | 22/76页 |
| 文件大小： | 1004K |
| 代理商： | WBLXT974BHCA8 |
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Fast Ethernet 10/100 Quad Transceivers — LXT974/LXT975
Datasheet
29
2.4
Auto-Negotiation
The LXT974/975 attempts to auto-negotiate with its counterpart across the link by sending Fast
Link Pulse (FLP) bursts. Each burst consists of 33 link pulses spaced 62.5
μs apart. Odd link
pulses (clock pulses) are always present. Even link pulses (data pulses) may be present or absent to
indicate a “1” or a “0”. Each FLP burst exchanges 16 bits of data, which are referred to as a
“page”. All devices that support auto-negotiation must support a “Base Page” as defined in the
IEEE 802.3 standard.
By exchanging Base Pages, the LXT974/975 and its link partner communicate their capabilities to
each other. Both sides must receive at least three identical base pages for negotiation to proceed.
Each side finds the highest common capabilities that both sides support. Both sides then exchange
more pages, and finally agree on the operating state of the line.
2.4.1
Parallel Detection
In parallel with auto-negotiation, the LXT974/975 also monitors for 10 Mbps Normal Link Pulses
(NLP) or 100 Mbps Idle symbols. If either is detected, the device automatically reverts to the
corresponding operating mode. Parallel detection allows the LXT974/975 to communicate with
devices that do not support auto-negotiation.
2.4.2
Controlling Auto-Negotiation
When auto-negotiation is controlled by software, the following steps are recommended:
After power-up, power-down, or reset, the power- down recovery time, as specified in Table
41 on page 62, must be exhausted before proceeding.
Set the auto-negotiation advertisement register bits.
Enable auto-negotiation by setting MDIO
bit 0.12 = 1.
2.4.3
Monitoring Auto-Negotiation
When auto-negotiation is being monitored, the following apply:
Bit 20.13 is set to 1 once the link is established.
Bits 20.12 and 20.11 can be used to determine the link operating conditions (speed and
duplex).
相关PDF资料 |
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| WBLXT9785EHC.C2V | DATACOM, INTERFACE CIRCUIT, PQFP208 |
| WBLXT9785EHC.D0-865110 | DATACOM, INTERFACE CIRCUIT, PQFP208 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| WBLXT975BHC.A8 | 功能描述:IC ENET 10/100QUAD TXCVR 160HQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:25 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:4.5 V ~ 5.5 V 安装类型:通孔 封装/外壳:16-DIP（0.300"，7.62mm） 供应商设备封装:16-PDIP 包装:管件 |
| WBLXT9785EHC.D0865110 | 功能描述:IC TXRX 8PORT ETHERNET 208-HQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:1,000 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC 包装:带卷 (TR) |
| WBLXT9785EHC.D0-865110 | 制造商:Cortina Systems Inc 功能描述:PHY 8-CH 10Mbps/100Mbps 208-Pin PQFP |
| WBLXT9785EHC.D0-865111 | 制造商:Cortina Systems Inc 功能描述:PHY 8-CH 10Mbps/100Mbps 208-Pin PQFP |
| WBLXT9785HC.D0 | 功能描述:IC TXRX 8PORT ETHERNET 208-HQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:1,000 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC 包装:带卷 (TR) |
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