参数资料
型号: X40435V14I-CT1
厂商: Intersil
文件页数: 7/26页
文件大小: 0K
描述: IC VOLT MON TRPL EEPROM 14-TSSOP
标准包装: 2,500
类型: 多压监控器
监视电压数目: 3
输出: 开路漏极或开路集电极
复位: 低有效
复位超时: 可调节/可选择
电压 - 阀值: 1V,2.9V,4.6V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 14-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 14-TSSOP
包装: 带卷 (TR)
X40430, X40431, X40434, X40435
PRINCIPLES OF OPERATION
Power-on Reset
Applying power to the X40430, X40431, X40434,
X40435 activates a Power-on Reset Circuit that pulls
the RESET/RESET pins active. This signal provides
several benefits.
– It prevents the system microprocessor from starting
to operate with insufficient voltage.
– It prevents the processor from operating prior to sta-
bilization of the oscillator.
– It allows time for an FPGA to download its configura-
tion prior to initialization of the circuit.
– It prevents communication to the EEPROM, greatly
reducing the likelihood of data corruption on power-up.
When V CC exceeds the device V TRIP1 threshold value
for t PURST (selectable) the circuit releases the RESET
(X40431, X40435) and RESET (X40430, X40434) pin
allowing the system to begin operation.
Figure 1. Connecting a Manual Reset Push-Button
X 40430,     X4043 4 V CC
in a power fail or brownout condition or used to inter-
rupt the microprocessor with notification of an impend-
ing power failure.
For the X40430 and X40431 the V2FAIL signal
remains active until the V2MON drops below 1V
(V2MON falling). It also remains active until V2MON
returns and exceeds V TRIP2 . This voltage sense cir-
cuitry monitors the power supply connected to V2MON
pin. If V CC = 0, V2MON can still be monitored.
For the X40434 and X40435, the V2FAIL signal
remains active until V CC drops below 1V and remains
active until V2MON returns and exceeds V TRIP2 . This
sense circuitry is powered by V CC . If V CC = 0, V2MON
cannot be monitored.
Low Voltage V3 Monitoring
The X40430, X40431, X40434, X40435 also monitors
a third voltage level and asserts V3FAIL if the voltage
falls below a preset minimum V TRIP3 . The V3FAIL sig-
nal is either ORed with RESET to prevent the micro-
processor from operating in a power fail or brownout
condition or used to interrupt the microprocessor with
notification of an impending power failure. The V3FAIL
System
Reset
RESET
signal remains active until the V3MON drops below 1V
(V3MON falling). It also remains active until V3MON
returns and exceeds V TRIP3 .
MR
Manual
Reset
This voltage sense circuitry monitors the power supply
connected to V3MON pin. If V CC = 0, V3MON can still
be monitored.
Manual Reset
By connecting a push-button directly from MR to ground,
the designer adds manual system reset capability. The
MR pin is LOW while the push-button is closed and
RESET/RESET pin remains HIGH/LOW until the push-
button is released and for t PURST thereafter.
Low Voltage V CC (V1 Monitoring)
During operation, the X40430, X40431, X40434,
X40435 monitors the V CC level and asserts
RESET/RESET if supply voltage falls below a preset
minimum V TRIP1 . The RESET/RESET signal prevents
the microprocessor from operating in a power fail or
brownout condition. The RESET/RESET signal remains
active until the voltage drops below 1V. It also remains
active until V CC returns and exceeds V TRIP1 for t PURST .
Low Voltage V2 Monitoring
The X40430 also monitors a second voltage level and
asserts V2FAIL if the voltage falls below a preset mini-
mum V TRIP2 . The V2FAIL signal is either ORed with
RESET to prevent the microprocessor from operating
7
Early Low V CC Detection (LOWLINE)
This CMOS output goes LOW earlier than
RESET/RESET whenever V CC falls below the V TRIP1
voltage and returns high when V CC exceeds the
V TRIP1 voltage. There is no power-up delay circuitry
(t PURST ) on this pin.
FN8251.1
May 24, 2006
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