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参数资料
| 型号： | X4C105 |
| 厂商： | Intersil Corporation |
| 元件分类： | CPU监测 |
| 英文描述： | RTC Module With CPU Supervisor |
| 中文描述： | 时钟模块CPU监控 |
| 文件页数： | 3/19页 |
| 文件大小： | 296K |
| 代理商： | X4C105 |
3
FN8124.0
March 18, 2005
Capacitor Backup Circuit
The diagram in Figure 1 shows a representation of the capacitor backup circuit.
Figure 1.
SERIAL INTERFACE
Serial Interface Conventions
The device supports a bidirectional bus oriented proto-
col. The protocol defines any device that sends data
onto the bus as a transmitter, and the receiving device
as the receiver. The device controlling the transfer is
called the master and the device being controlled is
called the slave. The master always initiates data
transfers, and provides the clock for both transmit and
receive operations. Therefore, the devices in this fam-
ily operate as slaves in all applications.
Serial Clock and Data
Data states on the SDA line can change only during
SCL LOW. SDA state changes during SCL HIGH are
reserved for indicating start and stop conditions. See
Figure 2.
Figure 2. Valid Data Changes on the SDA Bus
Start
NOVRAM
AUTOSTORE
To Internal
Voltage Supply
HIGH when
V
CC
> V
TRIP
LOW when
V
CC
<V
TRIP
-0.2V
V
TRIP
V
CC
CAP
SCL
SDA
Data Stable
Data Change
Data Stable
X4C105
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| X4C105V20-3C7889 | 制造商:Intersil Corporation 功能描述: |
| X4C105V20I | 功能描述:IC SUPERVISOR NOVRAM/EE 20-TSSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 监控器 系列:- 标准包装:100 系列:- 类型:简单复位/加电复位 监视电压数目:1 输出:- 复位:低有效 复位超时:最小为 100 ms 电压 - 阀值:4.38V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:8-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:8-TSSOP 包装:管件 |
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