参数资料
| 型号： | X4C105V20I |
| 厂商： | Intersil |
| 文件页数： | 2/14页 |
| 文件大小： | 0K |
| 描述： | IC SUPERVISOR NOVRAM/EE 20-TSSOP |
| 标准包装： | 75 |
| 类型： | 简单复位/加电复位 |
| 监视电压数目： | 1 |
| 输出： | 开路漏极或开路集电极 |
| 复位： | 低有效 |
| 复位超时： | 最小为 100 ms |
| 电压 - 阀值： | 2.875V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 20-TSSOP |
| 包装： | 管件 |
X4C105
Block Diagram
WP
WRITE CONTROL LOGIC
HV GENERATION
TIMING AND CONTROL
EEPROM
MEMORY
STATIC RAM
OUTPUT
BUFFERS
AND
LATCHES
O0
O1
O2
O3
SCL
SDA
S1
S2
COMMAND
DECODE
AND
CONTROL
LOGIC
EEPROM
ARRAY
MEMORY
4k-BITS
I/O
BUFFERS
D0
D1
D2
D3
Y DECODER
DATA REGISTER
LOW VOLTAGE DETECT
POWER-ON RESET
CONTROL
LOGIC AND
TIMING
VOLTAGE
MONITOR
SUPPLY
CE
OE
WE
CAP
V CC
V SS
RESET
Pinout
X4C105
(20 LD TSSOP)
TOP VIEW
Device Description
Serial Memory Section
The device contains a 4k-bit EEPROM memory array with an
internal address counter that allows it to be read
CAP
S1
S2
CE
WE
OE
RESET
O3
O2
1
2
3
4
5
6
7
8
9
20 V CC
19 WP
18 SCL
17 SDA
16 D0
15 D1
14 D2
13 D3
12 O0
sequentially, through its entire address space after receiving
only 1 full address. The serial interface includes a current
address read that requires no input address, but allows
reading of the entire array starting from the address plus one
of the last read or write. The address counter is also used for
the write operation where the user may enter up to a page of
data (16 bytes) after supplying only 1 full address.
A WP pin provides hardware write protection. The WP pin
active (HIGH) prevents writes to the top half of the memory.
V SS 10
Pin Descriptions
11 O1
This section is a 4k-bit version of an industry standard
24C04 device.
NOVRAM Section
PIN
V SS
SDA
V CC
SCL
WP
S1, S2
CAP
D0, D1, D2, D3
RESET
CE
OE
WE
O0, O1, O2, O3
DESCRIPTION
Ground
Serial Data
Power
Serial Clock
Write Protect
Device Select Inputs
External AUTOSTORE Capacitor
NOVRAM I/Os
Low Voltage Detect Output
NOVRAM Chip Enable
NOVRAM Read Signal
NOVRAM Write signal
NOVRAM Outputs
2
The X4C105 also contains a single nibble of NOVRAM, with
parallel access. This memory is completely isolated from the
serial memory section. The NOVRAM is intended to connect
to the system memory bus and uses standard CE, OE, and
WE pins to control access.
A NOVRAM (or nonvolatile RAM) consists of an SRAM part
and an EEPROM part. The SRAM is saved to EEPROM only
when power fails and the EEPROM is recalled to SRAM only
on power-up.
Output Ports
The X4C105 has four output only ports. These are active
whenever power is applied to the device. The state of the
output pin reflects the value in the respective SRAM bit. As
such, these port pins provide a nonvolatile state. The conditions
on the pins are restored when power is re-applied to the device.
This can be valuable as a DIP switch replacement for
controlling the conditions of an ASIC or other system logic.
FN8124.2
July 3, 2008
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相关代理商/技术参数 |
参数描述 |
|---|---|
| X4C105V20I-VTRIP | 制造商:未知厂家 制造商全称:未知厂家 功能描述:EEPROM |
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| X4C303N8DM | 制造商:SAIA - BURGESS ELECTRONICS INC. 功能描述:Catalogue / X4C303N8DM |
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