参数资料
| 型号： | XC2S100-5FG256C |
| 厂商： | Xilinx Inc |
| 文件页数： | 6/99页 |
| 文件大小： | 0K |
| 描述： | IC FPGA 2.5V 600 CLB'S 256-FBGA |
| 标准包装： | 1 |
| 系列： | Spartan®-II |
| LAB/CLB数： | 600 |
| 逻辑元件/单元数： | 2700 |
| RAM 位总计： | 40960 |
| 输入/输出数： | 176 |
| 门数： | 100000 |
| 电源电压： | 2.375 V ~ 2.625 V |
| 安装类型： | 表面贴装 |
| 工作温度： | 0°C ~ 85°C |
| 封装/外壳： | 256-BGA |
| 供应商设备封装： | 256-FBGA（17x17） |
| 其它名称： | 122-1226 XC2S100-5FG256C-ND |
第1页第2页第3页第4页第5页当前第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页
Spartan-II FPGA Family: Functional Description
DS001-2 (v2.8) June 13, 2008
Module 2 of 4
Product Specification
14
R
Boundary-scan operation is independent of individual IOB
configurations, and unaffected by package type. All IOBs,
including unbonded ones, are treated as independent
3-state bidirectional pins in a single scan chain. Retention of
the bidirectional test capability after configuration facilitates
the testing of external interconnections.
Table 7 lists the boundary-scan instructions supported in
Spartan-II FPGAs. Internal signals can be captured during
EXTEST by connecting them to unbonded or unused IOBs.
They may also be connected to the unused outputs of IOBs
defined as unidirectional input pins.
The public boundary-scan instructions are available prior to
configuration. After configuration, the public instructions
remain available together with any USERCODE
instructions installed during the configuration. While the
SAMPLE and BYPASS instructions are available during
configuration, it is recommended that boundary-scan
operations not be performed during this transitional period.
In addition to the test instructions outlined above, the
boundary-scan circuitry can be used to configure the FPGA,
and also to read back the configuration data.
To facilitate internal scan chains, the User Register
provides three outputs (Reset, Update, and Shift) that
represent the corresponding states in the boundary-scan
internal state machine.
Table 7: Boundary-Scan Instructions
Boundary-Scan
Command
Binary
Code[4:0]
Description
EXTEST
00000
Enables boundary-scan
EXTEST operation
SAMPLE
00001
Enables boundary-scan
SAMPLE operation
USR1
00010
Access user-defined
register 1
USR2
00011
Access user-defined
register 2
CFG_OUT
00100
Access the
configuration bus for
Readback
CFG_IN
00101
Access the
configuration bus for
Configuration
INTEST
00111
Enables boundary-scan
INTEST operation
USRCODE
01000
Enables shifting out
USER code
IDCODE
01001
Enables shifting out of
ID Code
HIZ
01010
Disables output pins
while enabling the
Bypass Register
JSTART
01100
Clock the start-up
sequence when
StartupClk is TCK
BYPASS
11111
Enables BYPASS
RESERVED
All other
codes
Xilinx reserved
instructions
相关PDF资料 |
PDF描述 |
|---|---|
| 25AA010AT-I/MNY | IC EEPROM SER 1K 1.8V 8TDFN |
| 3-747579-6 | CONN FERRULE STRAIGHT DB9/15/25 |
| 24LC64-E/SN | IC EEPROM 64KBIT 400KHZ 8SOIC |
| 93LC56C-I/ST | IC EEPROM 2KBIT 3MHZ 8TSSOP |
| XC2S150-5FG256I | IC FPGA 2.5V I-TEMP 256-FBGA |
相关代理商/技术参数 |
参数描述 |
|---|---|
| XC2S1005-FG256C | 制造商:Xilinx 功能描述:Field-Programmable Gate Array, 2700 Cell, 256 Pin, Plastic, BGA |
| XC2S1005FG256I | 制造商:XILINX 功能描述:New |
| XC2S100-5FG256I | 功能描述:IC FPGA 2.5V I-TEMP 256-FBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Spartan®-II 标准包装:40 系列:Spartan® 6 LX LAB/CLB数:3411 逻辑元件/单元数:43661 RAM 位总计:2138112 输入/输出数:358 门数:- 电源电压:1.14 V ~ 1.26 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:676-BGA 供应商设备封装:676-FBGA（27x27） |
| XC2S1005FG456C | 制造商:Xilinx 功能描述: |
| XC2S100-5FG456C | 功能描述:IC FPGA 2.5V 600 CLB'S 456-FBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Spartan®-II 标准包装:24 系列:ECP2 LAB/CLB数:1500 逻辑元件/单元数:12000 RAM 位总计:226304 输入/输出数:131 门数:- 电源电压:1.14 V ~ 1.26 V 安装类型:表面贴装 工作温度:0°C ~ 85°C 封装/外壳:208-BFQFP 供应商设备封装:208-PQFP（28x28） |
发布紧急采购，3分钟左右您将得到回复。