参数资料
型号: XC2S100-5FG256I
厂商: Xilinx Inc
文件页数: 14/99页
文件大小: 0K
描述: IC FPGA 2.5V I-TEMP 256-FBGA
标准包装: 90
系列: Spartan®-II
LAB/CLB数: 600
逻辑元件/单元数: 2700
RAM 位总计: 40960
输入/输出数: 176
门数: 100000
电源电压: 2.375 V ~ 2.625 V
安装类型: 表面贴装
工作温度: -40°C ~ 100°C
封装/外壳: 256-BGA
供应商设备封装: 256-FBGA(17x17)
Spartan-II FPGA Family: Functional Description
DS001-2 (v2.8) June 13, 2008
Module 2 of 4
Product Specification
21
R
Slave Serial Mode
In Slave Serial mode, the FPGA’s CCLK pin is driven by an
external source, allowing FPGAs to be configured from
other logic devices such as microprocessors or in a
daisy-chain configuration. Figure 15 shows connections for
a Master Serial FPGA configuring a Slave Serial FPGA
from a PROM. A Spartan-II device in slave serial mode
should be connected as shown for the third device from the
left. Slave Serial mode is selected by a <11x> on the mode
pins (M0, M1, M2).
Figure 16 shows the timing for Slave Serial configuration.
The serial bitstream must be setup at the DIN input pin a
short time before each rising edge of an externally
generated CCLK.
Multiple FPGAs in Slave Serial mode can be daisy-chained
for configuration from a single source. The maximum
amount of data that can be sent to the DOUT pin for a serial
daisy chain is 220-1 (1,048,575) 32-bit words, or 33,554,400
bits, which is approximately 25 XC2S200 bitstreams. The
configuration bitstream of downstream devices is limited to
this size.
After an FPGA is configured, data for the next device is
routed to the DOUT pin. Data on the DOUT pin changes on
the rising edge of CCLK. Configuration must be delayed
until INIT pins of all daisy-chained FPGAs are High. For
more information, see "Start-up," page 19.
Notes:
1.
If the DriveDone configuration option is not active for any of the FPGAs, pull up DONE with a 330
Ω resistor.
Figure 15: Master/Slave Serial Configuration Circuit Diagram
Spartan-II
(Master Serial)
PROM
PROGRAM
M2
M0 M1
DOUT
CCLK
CLK
3.3V
DATA
CE
CEO
RESET/OE
DIN
INIT
DONE
PROGRAM
3.3 K
DS001_15_060608
GND
Vcc
3.3V
VCCO
VCCINT
2.5V
3.3V
2.5V
Spartan-II
(Slave)
DONE
INIT
PROGRAM
CCLK
DIN
DOUT
M2
M0 M1
GND
VCCO
VCCINT
相关PDF资料
PDF描述
93LC76B-E/SN IC EEPROM 8KBIT 2MHZ 8SOIC
XC6SLX16-3CPG196I IC FPGA SPARTAN 6 14K 196CPGBGA
25LC020AT-E/OT IC EEPROM 2KBIT 10MHZ SOT23-6
24LC16BT-E/MC IC EEPROM 16KBIT 400KHZ 8DFN
24FC64T-I/ST IC EEPROM 64KBIT 1MHZ 8TSSOP
相关代理商/技术参数
参数描述
XC2S1005FG456C 制造商:Xilinx 功能描述:
XC2S100-5FG456C 功能描述:IC FPGA 2.5V 600 CLB'S 456-FBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA(现场可编程门阵列) 系列:Spartan®-II 标准包装:24 系列:ECP2 LAB/CLB数:1500 逻辑元件/单元数:12000 RAM 位总计:226304 输入/输出数:131 门数:- 电源电压:1.14 V ~ 1.26 V 安装类型:表面贴装 工作温度:0°C ~ 85°C 封装/外壳:208-BFQFP 供应商设备封装:208-PQFP(28x28)
XC2S100-5FG456I 功能描述:IC FPGA 2.5V I-TEMP 456-FBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA(现场可编程门阵列) 系列:Spartan®-II 产品变化通告:XC4000(E,L) Discontinuation 01/April/2002 标准包装:24 系列:XC4000E/X LAB/CLB数:100 逻辑元件/单元数:238 RAM 位总计:3200 输入/输出数:80 门数:3000 电源电压:4.5 V ~ 5.5 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:120-BCBGA 供应商设备封装:120-CPGA(34.55x34.55)
XC2S100-5FGG256C 功能描述:IC SPARTAN-II FPGA 100K 256-FBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA(现场可编程门阵列) 系列:Spartan®-II 标准包装:40 系列:Spartan® 6 LX LAB/CLB数:3411 逻辑元件/单元数:43661 RAM 位总计:2138112 输入/输出数:358 门数:- 电源电压:1.14 V ~ 1.26 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:676-BGA 供应商设备封装:676-FBGA(27x27)
XC2S100-5FGG256I 功能描述:IC SPARTAN-II FPGA 100K 256-FBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA(现场可编程门阵列) 系列:Spartan®-II 标准包装:40 系列:Spartan® 6 LX LAB/CLB数:3411 逻辑元件/单元数:43661 RAM 位总计:2138112 输入/输出数:358 门数:- 电源电压:1.14 V ~ 1.26 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:676-BGA 供应商设备封装:676-FBGA(27x27)