参数资料
| 型号： | XC3S100E-4CPG132C |
| 厂商： | Xilinx Inc |
| 文件页数： | 18/227页 |
| 文件大小： | 0K |
| 描述： | IC SPARTAN-3E FPGA 100K 132CSBGA |
| 产品培训模块： | FPGAs Spartan3 Extended Spartan 3A FPGA Family |
| 标准包装： | 1 |
| 系列： | Spartan®-3E |
| LAB/CLB数： | 240 |
| 逻辑元件/单元数： | 2160 |
| RAM 位总计： | 73728 |
| 输入/输出数： | 83 |
| 门数： | 100000 |
| 电源电压： | 1.14 V ~ 1.26 V |
| 安装类型： | 表面贴装 |
| 工作温度： | 0°C ~ 85°C |
| 封装/外壳： | 132-TFBGA，CSPBGA |
| 供应商设备封装： | 132-CSPBGA（8x8） |
| 产品目录页面： | 599 (CN2011-ZH PDF) |
| 其它名称： | 122-1515 |
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Spartan-3E FPGA Family: Functional Description
DS312 (v4.1) July 19, 2013
Product Specification
114
Notice of Disclaimer
THE XILINX HARDWARE FPGA AND CPLD DEVICES REFERRED TO HEREIN (“PRODUCTS”) ARE SUBJECT TO THE TERMS AND
CONDITIONS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED AT http://www.xilinx.com/warranty.htm. THIS LIMITED
WARRANTY DOES NOT EXTEND TO ANY USE OF PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE
SPECIFICATIONS STATED IN THE XILINX DATA SHEET. ALL SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE.
PRODUCTS ARE NOT DESIGNED OR INTENDED TO BE FAIL-SAFE OR FOR USE IN ANY APPLICATION REQUIRING FAIL-SAFE
PERFORMANCE, SUCH AS LIFE-SUPPORT OR SAFETY DEVICES OR SYSTEMS, OR ANY OTHER APPLICATION THAT INVOKES
THE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). USE OF PRODUCTS IN CRITICAL APPLICATIONS IS AT THE SOLE RISK OF CUSTOMER, SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
CRITICAL APPLICATIONS DISCLAIMER
XILINX PRODUCTS (INCLUDING HARDWARE, SOFTWARE AND/OR IP CORES) ARE NOT DESIGNED OR INTENDED TO BE
FAIL-SAFE, OR FOR USE IN ANY APPLICATION REQUIRING FAIL-SAFE PERFORMANCE, SUCH AS IN LIFE-SUPPORT OR
SAFETY DEVICES OR SYSTEMS, CLASS III MEDICAL DEVICES, NUCLEAR FACILITIES, APPLICATIONS RELATED TO THE
DEPLOYMENT OF AIRBAGS, OR ANY OTHER APPLICATIONS THAT COULD LEAD TO DEATH, PERSONAL INJURY OR SEVERE
PROPERTY OR ENVIRONMENTAL DAMAGE (INDIVIDUALLY AND COLLECTIVELY, “CRITICAL APPLICATIONS”). FURTHERMORE,
XILINX PRODUCTS ARE NOT DESIGNED OR INTENDED FOR USE IN ANY APPLICATIONS THAT AFFECT CONTROL OF A
VEHICLE OR AIRCRAFT, UNLESS THERE IS A FAIL-SAFE OR REDUNDANCY FEATURE (WHICH DOES NOT INCLUDE USE OF
SOFTWARE IN THE XILINX DEVICE TO IMPLEMENT THE REDUNDANCY) AND A WARNING SIGNAL UPON FAILURE TO THE
OPERATOR. CUSTOMER AGREES, PRIOR TO USING OR DISTRIBUTING ANY SYSTEMS THAT INCORPORATE XILINX
PRODUCTS, TO THOROUGHLY TEST THE SAME FOR SAFETY PURPOSES. TO THE MAXIMUM EXTENT PERMITTED BY
APPLICABLE LAW, CUSTOMER ASSUMES THE SOLE RISK AND LIABILITY OF ANY USE OF XILINX PRODUCTS IN CRITICAL
APPLICATIONS.
AUTOMOTIVE APPLICATIONS DISCLAIMER
XILINX PRODUCTS ARE NOT DESIGNED OR INTENDED TO BE FAIL-SAFE, OR FOR USE IN ANY APPLICATION REQUIRING
FAIL-SAFE PERFORMANCE, SUCH AS APPLICATIONS RELATED TO: (I) THE DEPLOYMENT OF AIRBAGS, (II) CONTROL OF A
VEHICLE, UNLESS THERE IS A FAIL-SAFE OR REDUNDANCY FEATURE (WHICH DOES NOT INCLUDE USE OF SOFTWARE IN
THE XILINX DEVICE TO IMPLEMENT THE REDUNDANCY) AND A WARNING SIGNAL UPON FAILURE TO THE OPERATOR, OR (III)
USES THAT COULD LEAD TO DEATH OR PERSONAL INJURY. CUSTOMER ASSUMES THE SOLE RISK AND LIABILITY OF ANY
USE OF XILINX PRODUCTS IN SUCH APPLICATIONS.
03/16/2007
3.5
Added information about new Spartan-3 Generation user guides (Design Documentation Available).
Generation Configuration User Guide. Added note about possible JTAG configuration issues when the
FPGA mode pins are set for Master mode and using software prior to ISE 9.1.01i (JTAG Mode).
Removed a few lingering references to “weak” pull-up resistors, including in Figure 12. Removed
vestigial references regarding the LDC[2:0] and HDC pins during Slave Parallel Mode configuration.
These pins are not used in this configuration mode.
05/29/2007
3.6
Added information about HSWAP and PCI differences between steppings to Table 71. Removed
“Performance Differences between Global Buffers” to match improved specs in Module 3. Updated
PROG_B pulse width descriptions to match specification in Module 3.
04/18/2008
3.7
Corrected Figure 6 to show six taps and updated associated text. Added note for recommended pull-up
on DONE in Table 55 and elsewhere. Added a caution regarding Persist of pins A20-A23. Updated
Stepping description in Table 71 to note that only Stepping 1 is in production today. Updated links.
08/26/2009
3.8
Added a frequency limitation to Equation 6. Added a new Equation 7 with a frequency limitation. Added
a Spread Spectrum, page 57 paragraph. Added Table 42, page 61. Updated a Flash vendor name in
Table 61, page 89. Removed the < symbol from the flash read access times in Table 62, page 89.
Revised the first paragraph in Configuration Sequence, page 102. Revised the first paragraph in
Power-On Behavior, page 111. Revised the second paragraph in Production Stepping, page 112.
Revised the first paragraph in Ordering a Later Stepping, page 112.
10/29/2012
4.0
Added Notice of Disclaimer. This product is not recommended for new designs.
Updated the design note section in VARIABLE Phase Shift Mode. Added the VQ100 to the Quadrant
Clock Routing section.
07/19/2013
4.1
Removed banner. This product IS recommended for new designs.
Date
Version
Revision
相关PDF资料 |
PDF描述 |
|---|---|
| AMM31DRSS | CONN EDGECARD 62POS DIP .156 SLD |
| XC3S100E-5VQG100C | IC FPGA SPARTAN-3E 100K 100-VQFP |
| 24LC08BHT-E/MS | IC EEPROM 8KBIT 400KHZ 8MSOP |
| XCS05-3VQ100C | IC FPGA 5V C-TEMP 100-VQFP |
| ASM36DRAS | CONN EDGECARD 72POS .156 R/A |
相关代理商/技术参数 |
参数描述 |
|---|---|
| XC3S100E-4CPG132C4124 | 制造商:Xilinx 功能描述: |
| XC3S100E-4CPG132I | 功能描述:IC FPGA SPARTAN-3E 100K 132CSBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Spartan®-3E 标准包装:40 系列:Spartan® 6 LX LAB/CLB数:3411 逻辑元件/单元数:43661 RAM 位总计:2138112 输入/输出数:358 门数:- 电源电压:1.14 V ~ 1.26 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:676-BGA 供应商设备封装:676-FBGA（27x27） |
| XC3S100E-4FG320C | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan-3E FPGA Family: Complete Data Sheet |
| XC3S100E-4FG320GC | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan-3E FPGA Family: Complete Data Sheet |
| XC3S100E-4FG320GI | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan-3E FPGA Family: Complete Data Sheet |
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