参数资料
型号: XCS30XL-4TQG144C
厂商: Xilinx Inc
文件页数: 50/83页
文件大小: 0K
描述: IC SPARTAN-XL FPGA 30K 144-TQFP
产品变化通告: Product Discontinuation 26/Oct/2011
标准包装: 60
系列: Spartan®-XL
LAB/CLB数: 576
逻辑元件/单元数: 1368
RAM 位总计: 18432
输入/输出数: 113
门数: 30000
电源电压: 3 V ~ 3.6 V
安装类型: 表面贴装
工作温度: 0°C ~ 85°C
封装/外壳: 144-LQFP
供应商设备封装: 144-TQFP(20x20)
产品目录页面: 599 (CN2011-ZH PDF)
其它名称: 122-1297
Spartan and Spartan-XL FPGA Families Data Sheet
54
DS060 (v2.0) March 1, 2013
Product Specification
R
Product Obsolete/Under Obsolescence
Spartan-XL Family Global Buffer Switching Characteristic Guidelines
All devices are 100% functionally tested. Internal timing
parameters are derived from measuring internal test pat-
terns. Listed below are representative values where one
global clock input drives one vertical clock line in each
accessible column, and where all accessible IOB and CLB
flip-flops are clocked by the global clock net.
When fewer vertical clock lines are connected, the clock dis-
tribution is faster; when multiple clock lines per column are
driven from the same global clock, the delay is longer. For
more specific, more precise, and worst-case guaranteed
data, reflecting the actual routing structure, use the values
provided by the static timing analyzer (TRCE in the Xilinx
Development System) and back-annotated to the simulation
netlist. These path delays, provided as a guideline, have
been extracted from the static timing analyzer report. All
timing parameters assume worst-case operating conditions
(supply voltage and junction temperature).
Symbol
Description
Device
Speed Grade
Units
-5
-4
Max
TGLS
From pad through buffer, to any clock K
XCS05XL
1.4
1.5
ns
XCS10XL
1.7
1.8
ns
XCS20XL
2.0
2.1
ns
XCS30XL
2.3
2.5
ns
XCS40XL
2.6
2.8
ns
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XCS30XL-4VQ144C 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays
XCS30XL-4VQ144I 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays