参数资料
| 型号： | XOCLCC6EVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 7/9页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR XOCLCC6 |
| 设计资源： | XOCLCC6EVB Gerber Files |
| 标准包装： | 1 |
| 主要目的： | 计时，时钟振荡器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | NBXxxxx 时钟振荡器，6-CLCC 封装 |
| 主要属性： | 用于 6-CLCC NBXxxxx 振荡器的衬垫 |
| 次要属性： | 单电源或分离式电源 |
| 已供物品： | 板 |
| 其它名称： | XOCLCC6EVBOS |
XOCLCC6EVB
Evaluation Board Fabrication Notes
1. Material: FR ? 4
2. Finished copper to be loz. (0.0014) external layers
3. Minimum copper plating 0.0007” thick for plated
thru holes annular ring to be 0.0002” minimum
4. LPI soldermask green
5. Soldermask registration " 0.002” N/A
6. All exposed copper areas to be gold plated
(0.000030” gold over 0.000100” nickel)
7. If specified, silkscreen is to be white epoxy ink.
8. Hole diameter tolerance is " 0.002”, maximum
layer to layer misregistration shall be 0.004”,
measurement method must comply with
MIL ? P ? 55110D, Figure 1.
9. Finished conductor width shall not vary more than
" 0.001” from artwork master 50 W traces are
0.024” wide.
10. Warp and twist of single sided boards shall not
exceed 0.002”per inch, warp and twist of
multi ? layer boards shall not exceed 0.010” per
inch.
11. All dimensions are in inches unless otherwise
specified tolerances. XX " 0.010” XXX " 0.004”.
12. Acceptability requirements per IPC ? A ? 600E.
13. Drawing is viewed from component or primary
side.
14. This is a 4 layer board.
15. All holes are plated thru unless otherwise
specified.
16. Drill size units are thousandths of an inch.
17. Trim all silkscreen which flows over via holes or
SMD pads.
18. Break all sharp edges, PCB edges should be
smooth and even.
http://onsemi.com
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