参数资料
型号: XR17V354IB176-F
厂商: Exar Corporation
文件页数: 32/66页
文件大小: 0K
描述: IC UART PCIE 256B QUAD 176FPBGA
产品培训模块: PCIe UARTs
标准包装: 160
特点: *
通道数: 4,QUART
FIFO's: 256 字节
规程: RS485
电源电压: 3.3V
带自动流量控制功能:
带IrDA 编码器/解码器:
带故障启动位检测功能:
带调制解调器控制功能:
安装类型: 表面贴装
封装/外壳: 176-LFBGA
供应商设备封装: 176-FPBGA(13x13)
包装: 托盘
其它名称: 1016-1472
XR17V354IB176-F-ND
XR17V354
38
HIGH PERFORMANCE QUAD PCI-EXPRESS UART
REV. 1.0.3
3.3
Infrared Mode
Each UART in the V354 includes the infrared encoder and decoder compatible to the IrDA (Infrared Data
Association) version 1.1. The input pin ENIR conveniently activates all 4 UART channels to start up in the
infrared mode. This global control pin enables the MCR bit [6] function in every UART channel register. After
power up or a reset, the software can overwrite MCR bit [6] if so desired. ENIR and MCR bit [6] also disable its
receiver while the transmitter is sending data. This prevents the echoed data from going to the receiver. The
global activation ENIR pin prevents the infrared emitter from turning on and drawing large amount of current
while the system is starting up. When the infrared feature is enabled, the transmit data outputs, TX[3:0], would
idle LOW. Likewise, the RX [3:0] inputs assume a LOW idle level.
The infrared encoder sends out a 3/16 of a bit wide pulse for each “0” bit in the transmit data stream. This
signal encoding reduces the on-time of the infrared LED, hence reduces the power consumption. See
Figure 11 below. Typical max data rate for the infrared encoder with a 3/16 of a bit wide pulse is 115.2 kbps.
For data rates above 115.2 kbps and up to1.152 Mbps, Fast IR mode can be enabled via DLD bit-4 for a 1/4 of
bit wide pulse. For exact 3/16 or 1/4 of a bit wide pulse, the 16X sampling rate should be used and DLD[3:0] =
’0000’. The IR pulse width can vary if DLD[3:0] is not ’0000’.
The infrared decoder receives the input pulse from the infrared sensing diode on RX pin. Each time the
decoder senses a light pulse, it returns a "0" to the data bit stream. The RX input signal may be inverted prior
delivered to the input of the decoder via internal register setting. This option supports active LOW instead of
normal active HIGH pulse from some infrared modules on the market.
FIGURE 11. INFRARED TRANSMIT DATA ENCODING AND RECEIVE DATA DECODING
Character
Data Bits
Start
Stop
00
0
11
1
11
Bit Time
1/16 Clock Delay
IRdecoder-1
RX Data
Receive
IR Pulse
(RX pin)
Character
Data Bits
Sta
rt
Stop
00
0
11
1
11
TX Data
Transmit
IR Pulse
(TX Pin)
Bit Time
1/2 Bit Time
3/16 or 1/4
Bit Time
IrEncoder-1
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