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参数资料
| 型号： | XR20M1172IG28 |
| 厂商： | Exar Corporation |
| 文件页数： | 8/55页 |
| 文件大小： | 0K |
| 描述： | IC UART FIFO I2C/SPI 64B 28TSSOP |
| 产品变化通告： | Leaded UART, V&I Obsolescence 11/Apr/2011 |
| 标准包装： | 50 |
| 特点： | * |
| 通道数： | 2，DUART |
| FIFO's： | 64 字节 |
| 规程： | RS485 |
| 电源电压： | 1.62 V ~ 3.63 V |
| 带自动流量控制功能： | 是 |
| 带IrDA 编码器/解码器： | 是 |
| 带故障启动位检测功能： | 是 |
| 带调制解调器控制功能： | 是 |
| 带CMOS： | 是 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 28-TSSOP |
| 包装： | 管件 |
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XR20M1172
16
TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO
REV. 1.2.0
2.7.1
Transmit Holding Register (THR) - Write Only
The transmit holding register is an 8-bit register providing a data interface to the host processor. The host
writes transmit data byte to the THR to be converted into a serial data stream including start-bit, data bits,
parity-bit and stop-bit(s). The least-significant-bit (Bit-0) becomes first data bit to go out. The THR is the input
register to the transmit FIFO of 64 bytes when FIFO operation is enabled by FCR bit-0. Every time a write
operation is made to the THR, the FIFO data pointer is automatically bumped to the next sequential data
location.
2.7.2
Transmitter Operation in non-FIFO Mode
The host loads transmit data to THR one character at a time. The THR empty flag (LSR bit-5) is set when the
data byte is transferred to TSR. THR flag can generate a transmit empty interrupt (ISR bit-1) when it is enabled
by IER bit-1. The TSR flag (LSR bit-6) is set when TSR becomes completely empty. The Non-FIFO Mode is
enabled by default for 16450 compatibility. For normal operation, the FIFO Mode must be enabled.
2.7.3
Transmitter Operation in FIFO Mode
The host may fill the transmit FIFO with up to 64 bytes of transmit data. The THR empty flag (LSR bit-5) is set
whenever the FIFO is empty. The THR empty flag can generate a transmit empty interrupt (ISR bit-1) when the
amount of data in the FIFO falls below its programmed trigger level. The transmit empty interrupt is enabled by
IER bit-1. The TSR flag (LSR bit-6) is set when TSR/FIFO becomes empty.
FIGURE 13. TRANSMITTER OPERATION IN NON-FIFO MODE
FIGURE 14. TRANSMITTER OPERATION IN FIFO AND FLOW CONTROL MODE
Transmit
Holding
Register
(THR)
Transmit Shift Register (TSR)
Data
Byte
L
S
B
M
S
B
THR Interrupt (ISR bit-1)
Enabled by IER bit-1
TXNOFIFO1
16X or 8X or 4X
Clock
( DLD[5:4] )
Transm it Data Shift Register
(TSR)
Transm it
Data Byte
TH R Interrupt (ISR bit-1) falls
below the program m ed Trigger
Level and then w hen becom es
em pty. FIFO is Enabled by FC R
bit-0=1
Transm it
FIFO
16X or 8X or 4X Clock
( DLD[5:4] )
Auto C TS Flow Control (CTS# pin)
Auto Software Flow C ontrol
Flow Control Characters
(Xoff1/2 and Xon1/2 Reg.)
TXFIFO 1
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XR20M1172IG28-F | 功能描述:UART 接口集成电路 UART RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| XR20M1172IG28-F | 制造商:Exar Corporation 功能描述:IC DUAL UART 16MBPS 3.63V 28-TSSOP 制造商:Exar Corporation 功能描述:IC, DUAL UART, 16MBPS, 3.63V, 28-TSSOP |
| XR20M1172IG28TR-F | 功能描述:UART 接口集成电路 1.8V 2 Ch 64-byte I2C/SPI UART RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| XR20M1172IL32 | 制造商:EXAR 制造商全称:EXAR 功能描述:TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO |
| XR20M1172IL32-F | 功能描述:UART 接口集成电路 UART RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
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