参数资料
型号: XRT71D04IVTR
厂商: Exar Corporation
文件页数: 22/22页
文件大小: 0K
描述: IC JITTER ATTENUATOR 4CH 80TQFP
标准包装: 1,000
类型: *
PLL:
输入: 时钟
输出: 时钟
电路数: 1
比率 - 输入:输出: 4:3
差分 - 输入:输出: 无/无
频率 - 最大: 44.736MHz
除法器/乘法器: 无/无
电源电压: 3.135 V ~ 5.25 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 80-LQFP
供应商设备封装: 80-TQFP(14x14)
包装: 带卷 (TR)
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XRT71D04
4 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER
REV. 1.1.1
8
66
MCLK_1
I
Master Clock Input - channel 1:
See description of pin 26.
Internal 50 K Ohm pull-up resistor.
67
GND
****
Digital Ground
68
RCLK_1
I
Received Clock (Jittery) - channel 1:
See description of pin 28.
Internal 50 K Ohm pull-up resistor.
69
RPOS_1
I
Received Positive Data (Jittery) Input: - channel 1:
See description of pin 29.
Internal 50 K Ohm pull-up resistor.
70
RNEG_1
I
Received Negative Data (Jittery) - channel 1:
See description of pin 30.
Internal 50 K Ohm pull-up resistor.
71
VDD
****
Digital Power Supply = 5V±5% or 3.3V±5%
72
RNEG_0
I
Received Negative Data (Jittery) - channel 0:
See description of pin 30.
Internal 50 K Ohm pull-up resistor.
73
RPOS_0
I
Received Positive Data (Jittery) Input: - channel 0:
See description of pin 29.
Internal 50 K Ohm pull-up resistor.
74
RCLK_0
I
Received Clock (Jittery) - channel 0:
See description of pin 28.
Internal 50 K Ohm pull-up resistor.
75
GND
****
Digital Ground
76
MCLK_0
I
Master Clock Input - channel 0:
See description of pin 26.
Internal 50 K Ohm pull-up resistor.
77
DJA_1/SDI
I
Harware Mode
Disable Jitter Attenuator Input - Channel 1:
See description of pin 25
Host Mode
Serial Data Input
The address value (of the command registers) or the data value is either Read or
Written through this pin.
The input data will be sampled on the rising edge of the SCLK pin.
Internal 50 K Ohm pull-down resistor.
78
STS1_3
I
SONET STS1 Mode Select - channel 3:
See description of pin 23
79
FL_3
O
FIFO Limit - channel 3:
See description of pin 22
80
AGND
****
Analog Ground
PIN DESCRIPTION
PIN #NAME
TYPE
DESCRIPTION
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