参数资料
| 型号： | XRT73LC04AIV-F |
| 厂商： | Exar Corporation |
| 文件页数： | 48/64页 |
| 文件大小： | 0K |
| 描述： | IC LIU E3/DS3/STS-1 4CH 144LQFP |
| 标准包装： | 60 |
| 类型： | 线路接口装置（LIU） |
| 驱动器/接收器数： | 4/4 |
| 规程： | DS3，E3，STS-1 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 144-LQFP |
| 供应商设备封装： | 144-LQFP（20x20） |
| 包装： | 托盘 |
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XRT73LC04A
48
4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.2
b. Operating in the Hardware Mode
To configure Channel (n) to operate in the Analog Lo-
cal Loop-Back Mode, set the LLB_(n) input pin (pin
76, 84, 97 or 105) “High" and the RLB_(n) input pin
(pin 77, 85, 96 or 104) "Low".
4.2
THE DIGITAL LOCAL LOOP-BACK MODE.
When a given channel is configured to operate in the
Digital Local Loop-Back Mode, the channel ignores
any signals that are input to the RTIP and RRing input
pins. The Transmitting Terminal Equipment transmits
clock and data into the XRT73LC04A via the TPData,
TNData and TxClk input pins. This data is processed
through the Transmit Clock Duty Cycle Adjust PLL
and the HDB3/B3ZS Encoder block. At this point, this
data is looped back to the HDB3/B3ZS Decoder
block. After this post-Loop-Back data has been pro-
cessed through the HDB3/B3ZS Decoder block, it
outputs to the Near-End Receiving Terminal Equip-
ment via the RPOS, RNEG and RxClk output pins.
Figure 34 illustrates the path that the data takes when
the chip is configured to operate in the Digital Local
Loop-Back Mode.
Configure a channel to operate in the Digital Local
Loop-Back Mode by employing either one of the fol-
lowing two-steps:
a. Operating in the Host Mode
To configure Channel (n) to operate in the Digital Lo-
cal Loop-Back Mode, write a "1" into both the LLB
and RLB bit-fields within Command Register CR4-(n).
COMMAND REGISTER CR4-(n)
D4
D3
D2
D1
D0
X
STS-1/DS3_(n)
E3_(n)
LLB_(n)
RLB_(n)
X
1
0
FIGURE 34. THE DIGITAL LOCAL LOOP-BACK PATH WITHIN A GIVEN CHANNEL
AGC/
Equalizer
Peak
Detector
LOS Detector
Slicer
Clock
Recovery
Data
Recovery
Invert
Loop MUX
HDB3/
B3ZS
Decoder
LOSTHR_(n)
SDI
SDO
SClk
CS/(SR/DR)
REGR
RTIP_(n)
RRing_(n)
REQEN_(n)
RxClk_(n)
RPOS_(n)
RNEG_(n)
LCV_(n)
RLOS_(n)
LLB_(n)
RLB_(n)
TAOS_(n)
TPData_(n)
TNData_(n)
TxClk_(n)
Notes: 1. (n) = 0, 1, 2, or 3 for respective Channels
2. Serial Processor Interface input pins are shared by the four Channels in HOST Mode and redefined in
Hardware Mode.
RLOL_(n) EXClk_(n)
Device
Monitor
MTIP_(n)
MRing_(n)
Transmit
Logic
Duty Cycle Adjust
TxLEV_(n)
TxOFF_(n)
DMO_(n)
TTIP_(n)
TRing_(n)
Pulse
Shaping
HDB3/
B3ZS
Encoder
Serial
Processor
Interface
Digital Local
Loop-Back Path
COMMAND REGISTER CR4-(n)
D4
D3
D2
D1
D0
X
STS-1/DS3_(n)
E3_(n)
LLB_(n) RLB_(n)
X
1
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XRT73R06 | 制造商:EXAR 制造商全称:EXAR 功能描述:SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73R06ES | 功能描述:网络控制器与处理器 IC RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| XRT73R06IB | 功能描述:外围驱动器与原件 - PCI RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| XRT73R06IB-F | 功能描述:外围驱动器与原件 - PCI RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| XRT73R12 | 制造商:EXAR 制造商全称:EXAR 功能描述:TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
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