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| 型号： | XRT75VL00D |
| 厂商： | Exar Corporation |
| 英文描述： | E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
| 中文描述： | E3/DS3/STS-1线路接口单元与SONET DESYNCHRONIZER |
| 文件页数： | 45/92页 |
| 文件大小： | 836K |
| 代理商： | XRT75VL00D |
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XRT75VL00D
REV. 1.0.3
E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
2
4.3.2 Interfacing to the line: ....................................................................................................................... 26
4.4 TRANSMIT DRIVE MONITOR: ............................................................................................................................. 26
Figure 16. Transmit Driver Monitor set-up. ..................................................................................................... 26
4.5 TRANSMITTER SECTION ON/OFF: ...................................................................................................................... 27
5.0 The Receiver Section: ...................................................................................................................... 27
5.1 AGC/EQUALIZER: ............................................................................................................................................ 27
5.1.1 Interference Tolerance: ..................................................................................................................... 27
Figure 17. Interference Margin Test Set up for DS3/STS-1 ........................................................................... 28
Figure 18. Interference Margin Test Set up for E3. ........................................................................................ 28
5.2 CLOCK AND DATA RECOVERY: ......................................................................................................................... 29
5.3 B3ZS/HDB3 DECODER: .................................................................................................................................. 29
5.4 LOS (LOSS OF SIGNAL) DETECTOR: ................................................................................................................ 29
5.4.1 DS3/STS-1 LOS Condition: ................................................................................................................ 29
TABLE 9: INTERFERENCE MARGIN TEST RESULTS .............................................................................................. 29
DISABLING ALOS/DLOS DETECTOR: ......................................................................................................... 30
5.4.2 E3 LOS Condition: ............................................................................................................................. 30
TABLE 10: THE ALOS (ANALOG LOS) DECLARATION AND CLEARANCE THRESHOLDS FOR A GIVEN SETTING OF
REQEN (DS3 AND STS-1 APPLICATIONS) ......................................................................................... 30
Figure 19. Loss Of Signal Definition for E3 as per ITU-T G.775 .................................................................... 30
5.4.3 Muting the Recovered Data with LOS condition: ............................................................................ 31
Figure 20. Loss of Signal Definition for E3 as per ITU-T G.775. .................................................................... 31
6.0 Jitter: ................................................................................................................................................. 32
6.1 JITTER TOLERANCE - RECEIVER: ...................................................................................................................... 32
6.1.1 DS3/STS-1 Jitter Tolerance Requirements: ..................................................................................... 32
Figure 21. Jitter Tolerance Measurements ..................................................................................................... 32
6.1.2 E3 Jitter Tolerance Requirements: ................................................................................................... 33
Figure 22. Input Jitter Tolerance For DS3/STS-1 .......................................................................................... 33
Figure 23. Input Jitter Tolerance for E3 ......................................................................................................... 33
6.2 JITTER TRANSFER - RECEIVER/TRANSMITTER: .................................................................................................. 34
6.3 JITTER GENERATION: ....................................................................................................................................... 34
6.4 JITTER ATTENUATOR: ...................................................................................................................................... 34
TABLE 11: JITTER AMPLITUDE VERSUS MODULATION FREQUENCY (JITTER TOLERANCE) ..................................... 34
TABLE 12: JITTER TRANSFER SPECIFICATIONS ................................................................................................... 34
7.0 Serial Host interface: ....................................................................................................................... 35
TABLE 13: JITTER TRANSFER PASS MASKS ....................................................................................................... 35
Figure 24. Jitter Transfer Requirements and Jitter Attenuator Performance .................................................. 35
TABLE 14: FUNCTIONS OF SHARED PINS ............................................................................................................ 36
TABLE 15: REGISTER MAP AND BIT NAMES ....................................................................................................... 36
TABLE 16: REGISTER MAP DESCRIPTION ........................................................................................................... 37
TABLE 17: REGISTER MAP DESCRIPTION - GLOBAL ............................................................................................ 41
8.0 Diagnostic Features: ........................................................................................................................ 43
8.1 PRBS GENERATOR AND DETECTOR: ................................................................................................................ 43
8.2 LOOPBACKS: ............................................................................................................................................... 43
8.2.1 ANALOG LOOPBACK: ....................................................................................................................... 43
Figure 25. PRBS MODE ................................................................................................................................. 43
8.2.2 DIGITAL LOOPBACK: ........................................................................................................................ 44
Figure 26. Analog Loopback ........................................................................................................................... 44
8.2.3 REMOTE LOOPBACK: ....................................................................................................................... 45
8.3 TRANSMIT ALL ONES (TAOS): ................................................................................................................... 45
Figure 27. Digital Loopback ............................................................................................................................ 45
Figure 28. Remote Loopback ......................................................................................................................... 45
Figure 29. Transmit All Ones (TAOS) ............................................................................................................. 46
9.0 THE SONET/SDH DE-SYNC FUNCTION within THE liu ................................................................ 47
9.1 BACKGROUND AND DETAILED INFORMATION - SONET DE-SYNC APPLICATIONS .......................... 47
Figure 30. A Simple Illustration of a DS3 signal being mapped into and transported over the SONET Network
48
9.2 MAPPING/DE-MAPPING JITTER/WANDER ................................................................................................ 49
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XRT75VL00D_08 | 制造商:EXAR 制造商全称:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET |
| XRT75VL00D1V-F | 制造商:Exar Corporation 功能描述: |
| XRT75VL00DES | 功能描述:时钟合成器/抖动清除器 1CHT3/E3/STS1LIU+ DESYNC 3.3V DRV VER RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| XRT75VL00DIV | 功能描述:时钟合成器/抖动清除器 3.3V 1 CH E3/DS3/STS W/SONET DE-SYNCH RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| XRT75VL00DIV-F | 功能描述:时钟合成器/抖动清除器 3.3V 1 CH E3/DS3/STS W/SONET DE-SYNCH RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
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