XRT75VL00D PDF资料下载(46/92 页)E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER

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参数资料

型号：	XRT75VL00D
厂商：	Exar Corporation
英文描述：	E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
中文描述：	E3/DS3/STS-1线路接口单元与SONET DESYNCHRONIZER
文件页数：	46/92页
文件大小：	836K
代理商：	XRT75VL00D

XRT75VL00D

E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER

REV. 1.0.3

8.2.3

REMOTE LOOPBACK:

With Remote loopback activated as shown in Figure 28,the receive data on RTIP and RRING is looped back

after the jitter attenuator (if selected in receive or transmit path) to the transmit path using RxClk as transmit

timing. The receive data is also output via the RPOS and RNEG pins.

During the remote loopback mode, if the jitter attenuator is selected in the transmit path, the receive data after

the Clock and Data Recovery Block is looped back to the transmit path and pass through the jitter attenuator

using RxClk as the transmit timing.

NOTE: Input signals on TxClk, TPDATA and TNDATA are ignored during Remote loopback.

8.3

TRANSMIT ALL ONES (TAOS):

Transmit All Ones (TAOS) can be set either in Hardware mode by pulling the TAOS pins “High” or in Host mode

by setting the TAOS control bits to “1” in the Channel control registers. When the TAOS is set, the Transmit

Section generates and transmits a continuous AMI all “1’s” pattern on TTIP and TRING pins. The frequency of

this “1’s” pattern is determined by TClk.TAOS data path is shown in Figure 29.

FIGURE 27. DIGITAL LOOPBACK

FIGURE 28. REMOTE LOOPBACK

TRING

TTIP

RRING

RTIP

RPOS

RNEG

RCLK

TNDATA

TCLK

TPDATA

HDB3/B3ZS1

ENCODER

HDB3/B3ZS1

DECODER

JITTER

ATTENUATOR

JITTER

ATTENUATOR

TIMING

CONTROL

DATA &

CLOCK

RECOVERY

1 if enabled

2 if enabled and selected in either Receive or Transmit path