参数资料
型号: XRT83SL314IB-L
厂商: Exar Corporation
文件页数: 53/83页
文件大小: 0K
描述: IC LIU SH T1/E1/J1 14CH 304TBGA
标准包装: 27
类型: 线路接口装置(LIU)
驱动器/接收器数: 14/14
规程: T1,E1,J1
电源电压: 3.135 V ~ 3.465 V
安装类型: 表面贴装
封装/外壳: 304-LBGA
供应商设备封装: 304-TBGA(31x31)
包装: 托盘
xr
XRT83SL314
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.1
54
D1
JABW
Jitter Bandwidth (E1 Mode Only, T1 is permanently set to 3Hz)
The jitter bandwidth is a global setting that is applied to both the
receiver and transmitter jitter attenuator.
0 = 10Hz
1 = 1.5Hz
R/W
0
D0
FIFOS
FIFO Depth Select
The FIFO depth select is used to configure the part for a 32-bit or
64-bit FIFO (within the jitter attenuator blocks). The delay of the
FIFO is equal to the FIFO depth. This is a global setting that is
applied to both the receiver and transmitter FIFO.
0 = 32-Bit
1 = 64-Bit
R/W
0
TABLE 27: MICROPROCESSOR REGISTER 0X02H BIT DESCRIPTION
CHANNEL 0-13 (0X02H-0XD2H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
INVQRSS
QRSS inversion
INVQRSS is used to invert the transmit QRSS pattern set by the
TxTEST[2:0] bits. By default, INVQRSS is disabled and the QRSS
will be transmitted with normal polarity.
0 = Disabled
1 = Enabled
R/W
0
D6
D5
D4
TxTEST2
TxTEST1
TxTEST0
Test Code Pattern
TxTEST[2:0] are used to select a diagnostic test pattern to the line
(transmit outputs).
0XX = No Pattern
100 = Tx QRSS
101 = Tx TAOS
110 = Tx TLUC
111 = Tx TLDC
R/W
0
TABLE 26: MICROPROCESSOR REGISTER 0X01H BIT DESCRIPTION
CHANNEL 0-13 (0X01H-0XD1H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
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