XRT83SL34 PDF资料下载(37/80 页)QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER

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参数资料

型号：	XRT83SL34
厂商：	Exar Corporation
英文描述：	QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
中文描述：	上海四的T1/E1/J1收发器时钟恢复和抖动衰减器
文件页数：	37/80页
文件大小：	856K
代理商：	XRT83SL34

XRT83SL34

QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

REV. P1.0.8

PRELIMINARY

In the Remote Loop-Back mode if the jitter attenuator is selected in the transmit path, the receive data from the

Clock and Data Recovery block is looped back to the transmit path and is applied to the jitter attenuator using

RCLK as transmit timing. In this mode the transmit clock and data are also ignored, while RCLK and received

data will continue to be available at their respective output pins. Remote Loop-Back with the jitter attenuator

selected in the transmit path is shown in Figure 20.

DIGITAL LOOP-BACK (DLOOP)

Digital Loop-Back or Local Loop-Back allows the transmit clock and data to be looped back to the

corresponding receiver output pins through the encoder/decoder and jitter attenuator. In this mode, receive

data and clock are ignored, but the transmit data will be sent to the line uninterrupted. This loop back feature

allows users to configure the line interface as a pure jitter attenuator. The Digital Loop-Back signal flow is

shown in Figure 21.

FIGURE 20. REMOTE LOOP-BACK MODE WITH JITTER ATTENUATOR SELECTED IN TRANSMIT PATH

FIGURE 21. DIGITAL LOOP-BACK MODE WITH JITTER ATTENUATOR SELECTED IN TRANSMIT PATH

Decoder

Timing

Control

Clock &

Data

Recovery

TPOS

TNEG

TCLK

RCLK

RPOS

RNEG

Encoder

TTIP

TRING

RTIP

RRING

Decoder

Timing

Control

Data &

Clock