参数资料
型号: XRT91L34IV
厂商: Exar Corporation
文件页数: 5/38页
文件大小: 0K
描述: IC MULTIRATE CDR QUAD 128LQFP
标准包装: 72
类型: 时钟和数据恢复(CDR),扇出缓冲器(分配),多路复用器
PLL:
主要目的: SONET/SDH,STS,STM
输入: LVDS,LVPECL
输出: LVDS,LVPECL
电路数: 1
比率 - 输入:输出: 1:2
差分 - 输入:输出: 是/是
频率 - 最大: 622.08MHz
电源电压: 1.71 V ~ 3.465 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 128-LQFP
供应商设备封装: 128-LQFP(14x14)
包装: 托盘
XRT91L34
13
REV. 1.0.1
QUAD CHANNEL MULTIRATE STS-12/3/1 AND STM-4/1/0 SONET/SDH CDR
1.3
Reference Clock Input
The XRT91L34 can accept either a 19.44 MHz or 77.76 MHz Differential clock input at REFCLKP/N or a
Single-Ended LVTTL clock input at TTLREFCLK. The REFCLKP/N or TTLREFCLK should be generated from
a source which has a frequency accuracy better than ±100ppm in order for the CDR Loss of Lock detector to
have the necessary accuracy required for SONET systems. The reference clock can be provided with one of
two frequencies chosen by CDRREFSEL. The reference frequency options for the XRT91L34 are listed in
Table 2. Figure 3 illustrate the reference clock design options.
TABLE 2: CDR REFERENCE FREQUENCY OPTIONS (LVDS/ DIFF LVPECL OR SINGLE-ENDED LVTTL/LVCMOS)
CDRREFSEL
REFCLKP/N OR TTLREFCLK
FREQUENCY
CHANNEL 0 - 3
AVAILABLE DATA RATES
0
77.76 MHz
STS-1/STM-0 51.84 Mbps
STS-3/STM-1 155.52 Mbps
STS-12/STM-4 622.08 Mbps
1
19.44 MHz
FIGURE 3. REFERENCE CLOCK DESIGN OPTIONS
Single-Ended LVTTL/LVCMOS
Reference Clock Option
Differential LVPECL or LVDS
Reference Clock Option
XRT91L34
130 Ohm
REFCLKP and REFCLKN pins
internally biased and terminated with
100 Ohm line-to-line
Tie unused TTLREFCLK
input pin to GND
Differential Clock
Source
77.76/19.44 MHz
TTLREFCLK
XRT91L34
Leave REFCLKP unconnected
and
tie REFCLKN pin to GND
Single Ended
Clock Source
77.76/19.44 MHz
Resistors for LVPECL
Remove for LVDS
REFCLKP
REFCLKN
VBB1.2
100
Internal
REFCLK
VBB1.2
100
Internal
REFCLK
REFCLKP
REFCLKN
TTLREFCLK
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